TLE 8108 EM

Smart 8-Channel Low Side Switch

Serial Peripheral Interface (SPI)

Data Sheet

21

Rev. 1.0, 2011-03-23

8

Serial Peripheral Interface (SPI)

The diagnosis and control interface is based on a serial peripheral interface (SPI).

The SPI is a full duplex synchronous serial slave interface, which uses four lines: SO, SI, SCLK and CS. Data is

transferred by the lines SI and SO at the data rate given by SCLK. The falling edge of CS indicates the beginning

of a data access. Data is sampled in on line SI at the falling edge of SCLK and shifted out on line SO at the rising

edge of SCLK. Each access must be terminated by a rising edge of CS. A modulo 8 counter ensures that data is

taken only, when a multiple of 8 bit has been transferred, while the minimum of 16 bit is also taken into

consideration. Therefore the interface provides daisy chain capability even with 8 bit SPI devices.

Figure 10

Serial peripheral Interface

The SPI protocol is described in Section 8.3. It is reset to the default values after programming the device into

Standby mode (all the channels in Clear mode).

8.1

SPI Signal Description

There is one internal register where the diagnosis information is stored and a shift register used for transmitting

the information via SO.

CS - Chip Select:

The system microcontroller selects the TLE8108EM by means of the CS pin. Whenever the pin is in low state, data

transfer can take place. When CS is in high state, any signals at the SCLK and SI pins are ignored and SO is

forced into a high impedance state.

CS High to Low transition:

•

The information which is stored in the internal diagnosis register is transferred into the shift register.

•

SO changes from high impedance state to high or low state depending on the logic OR combination between

the transmission error flag (TER) and the signal level at pin SI. The transmission error flag is set after any kind

of reset, so a reset between two SPI commands is indicated. For details, please refer to Figure 11. This

information stays available till the first rising edge of SCLK.

SPI interface.vsd

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