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OMAP5912ZVLR Datasheet(PDF) 73 Page - Texas Instruments

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Part # OMAP5912ZVLR
Description  OMAP5912 Applications Processor
PDF  270 Pages
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

OMAP5912ZVLR Datasheet(HTML) 73 Page - Texas Instruments

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Introduction
73
December 2003 − Revised December 2005
SPRS231E
Table 2−4. ZZG Package Terminal Characteristics (Continued)
ZZG
BALL
NO.
SUPPLY
RESET
STATE#
OTHER
BUFFER
STRENGTH§
PULLUP/
PULLDN‡
MUX CTRL SETTING
(see Notes 3 and 4)
TYPE†
SIGNAL NAME
W15
BCLKREQ
I
Reg9[29:27] = 000
PU20,
PD20
2 mA (Lv)
3 mA (Hv)
A, F
LZ
DVDD7
W15
UART3.CTS
I
Reg9[29:27] = 001
PU20,
PD20
2 mA (Lv)
3 mA (Hv)
A, F
LZ
DVDD7
MMC2.DAT2
I/O
Reg9[29:27] = 110
GPIO40
I/O
Reg9[29:27] = 111
Y15
BCLK
O
RegA[2:0] = 000
PU20,
PD20
2 mA (Lv)
3 mA (Hv)
A, F, G1
0
DVDD7
Y15
UART3.RTS
O
RegA[2:0] = 001
PU20,
PD20
2 mA (Lv)
3 mA (Hv)
A, F, G1
0
DVDD7
CAM.OUTCLK
O
RegA[2:0] = 110
GPIO17
I/O
RegA[2:0] = 111
AA15
LOW_STATE
O
Reg9[14:12] = 000
PU20,
PD20
2 mA (Lv)
3 mA (Hv)
A, F, G1
0
DVDD7
AA15
UART1.RTS
O
Reg9[14:12] = 001
PU20,
PD20
2 mA (Lv)
3 mA (Hv)
A, F, G1
0
DVDD7
UART1.IRSHDN
O
Reg9[14:12] = 010
Z_STATE
Z
Reg9[14:12] = 110
GPIO39
I/O
Reg9[14:12] = 111
R14
UART1.CTS
I
Reg9[17:15] = 000
PU20,
PD20
2 mA (Lv)
3 mA (Hv)
A, F
LZ
DVDD7
R14
UART1.IRSEL
O
Reg9[17:15] = 010
PU20,
PD20
2 mA (Lv)
3 mA (Hv)
A, F
LZ
DVDD7
GPIO38
I/O
Reg9[17:15] = 111
V14
UART1.RX
I
Reg9[20:18] = 000
PU20,
PD20
2 mA (Lv)
3 mA (Hv)
A, F
LZ
DVDD7
V14
UART1.IRRX
I
Reg9[20:18] = 010
PU20,
PD20
2 mA (Lv)
3 mA (Hv)
A, F
LZ
DVDD7
GPIO37
I/O
Reg9[20:18] = 111
Y14
LOW_STATE
O
Reg9[23:21] = 000
2 mA (Lv)
3 mA (Hv)
A, B, F,
G1
0
DVDD7
Y14
UART1.TX
O
Reg9[23:21] = 001
2 mA (Lv)
3 mA (Hv)
A, B, F,
G1
0
DVDD7
UART1.IRTX
O
Reg9[23:21] = 010
W14
MCSI1.DOUT
O
Reg9[26:24] = 000
2 mA (Lv)
3 mA (Hv)
A, B, F,
G1, H3
0
DVDD7
W14
USB1.TXD
O
Reg9[26:24] = 001
2 mA (Lv)
3 mA (Hv)
A, B, F,
G1, H3
0
DVDD7
TDO
O
Reg9[26:24] = 011
MCBSP3.DX
O
Reg9[26:24] = 100
GPIO18
I/O
Reg9[26:24] = 111
† I = Input, O = Output, Z = High-Impedance
‡ PD20 = 20-
µA internal pulldown, PD100=100-µA internal pulldown, PU20 = 20-µA internal pullup, PU100 = 100-µA internal pullup. Pullup or
pulldown can be enabled or disabled by software.
§ Lv = Low voltage (1.65 V), Hv = High voltage (2.5 V)
A = Standard LVCMOS input/output
G1 = Terminal may be gated by BFAIL
B = SUBLVDS input/ouput
G2 = Terminal may be gated by GPIO9 and MPUIO3
C = USB transceiver input/ouput
G3 = Terminal my be gated by BFAIL and OMAP5912 Internal Reset
D = I2C input/output buffers
H1 = Terminal may be 3-stated by BFAIL input
E = Analog oscillator terminals
H3 = MCSI1.DOUT pin can be forced into a high-impedance
F = Boundary-scannable terminal
state by the OMAP5912 HIGH_IMP3 control bit
K = Output buffer includes a serial resistor of 20
Ω to match with PCB line impedance and ensure proper signal integrity
# Z = High-Impedance, LZ = Low-Impedance (pin is driven), 1 = Output driven high, 0 = Output driven low
|| Slew time constraint of the EXT_DMA_REQ1 must be lower than or equal to 10 ns (from 10% to 90% of DVDD) in Mode 1.
kSlew time constraint of the EXT_DMA_REQ0 must be lower than or equal to 10 ns (from 10% to 90% of DVDD) in Mode 1.
NOTES: 3. NA denotes no multiplexing on the ball
4. ‘Regx’ denotes the terminal multiplexing register that controls the specified terminal where Regx = FUNC_MUX_CTRL_x



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