Analog Frequency Multiplier

PL56X-XX VCXO Family

Oscillator

Amplifier

OE

Q

QBAR

Frequency

X2

XIN

XOUT

L2X

VCON

Frequency

X4

L4X

Only required in x4 designs

Figure 2: Block Diagram of VCXO AFM

Figure 3 shows the period jitter histogram of the 2x Analog Frequency Multiplier at 311.04 MHz, while Figure 4

shows the very low rejection levels of sub-harmonics that correspond to the exceptionally low jitter performance.

Figure 3: Period Jitter Histogram at 311.04 MHz

Figure 4: Spectrum Analysis at 311.04 MHz

Analog Frequency Multiplier (2x)

Analog Frequency Multiplier (2x)

with 155.52MHz crystal

with sub-harmonics below –72 dBc

OE LOGIC SELECTION

OUTPUT

OESEL

OE

Output State

LVPECL

0 (Default)

0 (Default)

Enabled

1

Tri-state

1

0

Tri-state

1 (Default)

Enabled

LVDS or LVCMOS

0 (Default)

0

Tri-state

1 (Default)

Enabled

1

0 (Default)

Enabled

1

Tri-state

OESEL and OE: Connect to VDD or leave floating to set to “1”, connect to GND to set to “0”.

Internally set to default through pull-down / -up.