TM4EP64BJN, TM4EP64BPN, TM4EP64CJN, TM4EP64CPN 4194304 BY 64-BIT

TM4EP72BJN, TM4EP72BPN, TM4EP72CJN, TM4EP72CPN 4194304 BY 72-BIT

EXTENDED-DATA-OUT DYNAMIC RAM MODULES

SMMS682A – AUGUST 1997– REVISED MARCH 1998

15

POST OFFICE BOX 1443

serial presence detect

The serial presence detect (SPD) is contained in a 256-byte Serial EEPROM located on the module. The SPD

nonvolatile EEPROM contains various data such as module configuration, DRAM organization, and timing

parameters (see Table 1 through Table 4). Only the first 128 bytes are programmed by Texas Instruments, while

the remaining 128 bytes are available for customer use. Programming is done through an IIC bus using the clock

(SCL) and data (SDA) signals. All Texas Instruments modules comply with the current JEDEC SPD Standard.

See the Texas Instruments

Serial Presence Detect Technical Reference (literature number SMMU001) for

further details.

SPD contents for the TM4EPxxxxN devices are listed in the following tables:

Table 1–TM4EP64BxN

Table 2–TM4EP64CxN

Table 3–TM4EP72BxN

Table 4–TM4EP72CxN

Table 1. Serial-Presence-Detect Data for the TM4EP64BxN

BYTE

FUNCTION DESCRIBED

’4EP64BxN-50

’4EP64BxN-60

’4EP64BxN-70

NO.

FUNCTION DESCRIBED

ITEM

DATA

ITEM

DATA

ITEM

DATA

0

Defines number of bytes

written into serial memory

during module manufacturing

128 bytes

80h

128 bytes

80h

128 bytes

80h

1

Total number of bytes of SPD

memory device

256 bytes

08h

256 bytes

08h

256 bytes

08h

2

Fundamental memory type

(FPM, EDO, SDRAM)

EDO

02h

EDO

02h

EDO

02h

3

Number of row addresses on

this assembly

10

0Ah

10

0Ah

10

0Ah

4

Number of column addresses

on this assembly

10

0Ah

10

0Ah

10

0Ah

5

Number of module banks on

this assembly

1 bank

01h

1 bank

01h

1 bank

01h

6

Data width of this assembly

64 bits

40h

64 bits

40h

64 bits

40h

7

Data width continuation

00h

00h

00h

8

Voltage interface standard of

this assembly

LVTTL

01h

LVTTL

01h

LVTTL

01h

9

RASx access time of module

tRAC = 50 ns

32h

tRAC = 60 ns

3Ch

tRAC = 70 ns

46h

10

CASx access time of module

tRAC = 13 ns

0Dh

tRAC = 15 ns

0Fh

tRAC = 18 ns

12h

11

DIMM configuration type

(non-parity, parity, ECC)

Non-parity

00h

Non-parity

00h

Non-parity

00h

12

Refresh rate / type

15.6

µs

00h

15.6

µs

00h

15.6

µs

00h

13

DRAM width, primary DRAM

x4

04h

x4

04h

x4

04h

14

Error-checking SDRAM data

width

N/A

00h

N/A

00h

N/A

00h

62

SPD revision

Rev. 1

01h

Rev. 1

01h

Rev. 1

01h

63

Checksum for bytes 0 – 62

36

24h

48

30h

61

3Dh

64–71

Manufacturer’s

JEDEC

ID

code per JEP-106E

97h

9700...00h

97h

9700...00h

97h

9700...00h

72

Manufacturing location†

TBD

TBD

TBD

73–90

Manufacturer’s part number†

TBD

TBD

TBD

91

Die revision code†

TBD

TBD

TBD

92

PCB revision code†

TBD

TBD

TBD