Pin Description

V

analog input signal. This pin should be biased at half of

the supply voltage, V

6.

OUT (2): The attenuated analog output signal comes from

this pin.

GND (3): The GND pin references the digital input signals

and is the lower voltage reference for the IC. Typically this

pin would be labeled “V

the digital logic input control is tied to this same point. With

a higher pin-count there would generally be separate pins

for these functions; V

that the LM1971 always be operated using a single volt-

age supply configuration, for which pin 3 (GND) should al-

ways be at system ground. If a bipolar or split-supply con-

figuration are desired, level shifting circuitry is needed for

the digital logic control pins as they would be referenced

through pin 3 which would be at the negative supply. It is

highly recommended, however, that the LM1971 be used

in a unipolar or single-supply configuration.

LOAD (4): The LOAD input accepts a TTL or CMOS level

signal. This is the enable pin of the device, allowing data

to be clocked in while this input is low (0V). The GND pin

is the reference for this signal.

DATA (5): The DATA input accepts a TTL or CMOS level

signal. This pin is used to accept serial data from a micro-

controller that will be latched and decoded to change the

channel’s attenuation level. The GND pin is the reference

for this signal.

CLOCK (6): The CLOCK input accepts a TTL or CMOS

level signal. The clock input is used to load data into the

internal shift register on the rising edge of the input clock

waveform. The GND pin is the reference for this signal.

V

this pin.

IN (8): The analog input signal should be placed to this

pin.

Typical Performance

Characteristics

Supply Current vs

Supply Voltage

DS012353-10

Supply Current vs

Temperature

DS012353-11

Noise Floor

Analog Measurement

DS012353-12

THD+Nvs Freq and Amp

DS012353-13

THD+Nvs Freq and Amp

DS012353-14

Noise Floor Spectrum by FFT

DS012353-15

www.national.com

4