If Military/Aerospace specified devices are required,

please contact the National Semiconductor Sales Office/

Distributors for availability and specifications.

Supply Voltage, (V

+90V

Bias Voltage, (V

+16V

Input Voltage, (V

0Vto6V

Storage Temperature Range, (T

−65˚C to +150˚C

Lead Temperature

300˚C

ESD Tolerance, Human Body Model

2 kV

Machine Model

250V

V

CC

+60V to +85V

V

BB

+8V to +15V

V

IN

+0V to +5V

V

OUT

+15V to +75V

Case Temperature

−20˚C to +100˚C

Do not operate the part without a heat sink.

Electrical Characteristics

(See

Figure 2 for Test Circuit)

Unless otherwise noted: V

DC Tests: V

AC Tests: Output = 40 V

Symbol

Parameter

Condition

LM2415

Units

Min

Typ

Max

I

CC

Supply Current

Per Channel, No Input Signal, No

Output Load

13

mA

I

BB

Bias Current

All Three Channels

14

mA

V

OUT

DC Output Voltage

No AC Input Signal, V

62

65

68

V

DC

A

V

DC Voltage Gain

No AC Input Signal

−12

−14

−16

∆A

V

Gain Matching

(Note 4), No AC Input Signal

1.0

dB

LE

Linearity Error

(Notes 4, 5), No AC Input Signal

8

%

t

R

Rise Time

(Note 6), 10% to 90%

5.5

ns

t

F

Fall Time

(Note 6), 90% to 10%

6.0

ns

OS

Overshoot

(Note 6)

5

%

Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur.

Note 2: Operating ratings indicate conditions for which the device is functional, but do not guarantee specific performance limits. For guaranteed specifications and

test conditions, see the Electrical Characteristics. The guaranteed specifications apply only for the test conditions listed. Some performance characteristics may

change when the device is not operated under the listed test conditions.

Note 3: All voltages are measured with respect to GND, unless otherwise specified.

Note 4: Calculated value from Voltage Gain test on each channel.

AC Test Circuit

Figure 2 shows a typical test circuit for evaluation of the LM2415. This circuit is designed to allow testing of the LM2415 in a 50

Ω

environment without the use of an expensive FET probe. The two 2490

Ω resistors at the output form a 200:1 voltage divider when

connected to a 50

Ω load.

DS100978-3

Note: 8 pF load includes parasitic capacitance.

FIGURE 2. Test Circuit (One Channel)

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