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S29GL01GT Datasheet(PDF) 3 Page - Cypress Semiconductor

Part # S29GL01GT
Description  1 Gbit (128 Mbyte), 512 Mbit (64 Mbyte)
PDF  105 Pages
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Manufacturer  CYPRESS [Cypress Semiconductor]
Direct Link  http://www.cypress.com
Logo CYPRESS - Cypress Semiconductor

S29GL01GT Datasheet(HTML) 3 Page - Cypress Semiconductor

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S29GL01GT, S29GL512T
Document Number: 002-00247 Rev. *G
Page 3 of 105
Contents
1.
Product Overview ....................................................... 4
Software Interface
2.
Address Space Overlays ............................................ 6
2.1
Flash Memory Array...................................................... 7
2.2
Device ID and CFI (ID-CFI) ASO .................................. 8
2.3
Status Register ASO..................................................... 9
2.4
Data Polling Status ASO............................................... 9
2.5
Secure Silicon Region ASO .......................................... 9
2.6
Sector Protection Control............................................ 10
2.7
ECC Status ASO......................................................... 11
3.
Data Protection ......................................................... 12
3.1
Device Protection Methods ......................................... 12
3.2
Command Protection .................................................. 12
3.3
Secure Silicon Region (OTP)...................................... 12
3.4
Sector Protection Methods.......................................... 13
4.
Read Operations ....................................................... 18
4.1
Asynchronous Read.................................................... 18
4.2
Page Mode Read ........................................................ 18
5.
Embedded Operations.............................................. 19
5.1
Embedded Algorithm Controller (EAC) ....................... 19
5.2
Program and Erase Summary .................................... 19
5.3
Automatic ECC ........................................................... 21
5.4
Command Set ............................................................. 22
5.5
Status Monitoring ........................................................ 36
5.6
Error Types and Clearing Procedures ........................ 41
5.7
Embedded Algorithm Performance Table................... 44
6.
Data Integrity ............................................................. 47
6.1
Erase Endurance ........................................................ 47
6.2
Data Retention ............................................................ 47
7.
Software Interface Reference .................................. 48
7.1
Command Summary ................................................... 48
7.2
Device ID and Common Flash Interface (ID-CFI) ASO
Map ............................................................................ 55
Hardware Interface
8.
Signal Descriptions .................................................. 60
8.1
Address and Data Configuration................................. 60
8.2
Input/Output Summary................................................ 60
8.3
Word/Byte Configuration............................................. 61
8.4
Versatile I/O Feature.................................................... 61
8.5
Ready/Busy# (RY/BY#) ............................................... 61
8.6
Hardware Reset........................................................... 61
9.
Signal Protocols......................................................... 62
9.1
Interface States............................................................ 62
9.2
Power-Off with Hardware Data Protection ................... 63
9.3
Power Conservation Modes......................................... 63
9.4
Read ............................................................................ 63
9.5
Write ............................................................................ 64
10.
Electrical Specifications............................................ 65
10.1 Absolute Maximum Ratings ......................................... 65
10.2 Thermal Resistance..................................................... 65
10.3 Latchup Characteristics ............................................... 65
10.4 Operating Ranges........................................................ 66
10.5 DC Characteristics ....................................................... 68
10.6 Capacitance Characteristics ........................................ 71
11.
Timing Specifications................................................ 72
11.1 Key to Switching Waveforms ....................................... 72
11.2 AC Test Conditions...................................................... 72
11.3 Power-On Reset (POR) and Warm Reset ................... 73
11.4 AC Characteristics ....................................................... 75
12.
Physical Interface ...................................................... 90
12.1 56-Pin TSOP................................................................ 90
12.2 64-Ball FBGA............................................................... 92
12.3 56-Ball FBGA............................................................... 95
13.
Special Handling Instructions for FBGA Package.. 96
14.
Ordering Information ................................................. 97
15.
Other Resources...................................................... 101
15.1 Cypress Flash Memory Roadmap ............................. 101
15.2 Links to Software ....................................................... 101
15.3 Links to Application Notes.......................................... 101
16.
Document History Page .......................................... 102
Sales, Solutions, and Legal Information .........................105
Worldwide Sales and Design Support ......................... 105
Products ...................................................................... 105
PSoC® Solutions ........................................................ 105
Cypress Developer Community ................................... 105
Technical Support ....................................................... 105



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