when the duty cycle is higher than 50%. For the LM2630, this

compensation ramp is internally set to equal the maximum

down slope of the current amplifier output:

Where n = 5 is the gain of the current sense amplifier. The

maximum output voltage equals 6V. Also, a 10 µH inductor

and a 0.025

Ω sense resistor are assumed to determine the

internal compensation ramp. Different values of inductor and

sense resistor can be used as long as the resulted M

DOWN

(= nxR

Pulse-Skipping Mode at Light Load

Pulse-skipping mode can be enabled by pulling PFWM pin

low. This mode decreases switching frequency at light loads

to reduce the switching frequency related losses. If PFWM is

set at low, the controller goes into the pulse-skipping mode

when the sensed inductor current goes below the 25 mV

threshold set by the pulse-skipping comparator. In the

pulse-skipping mode, the high-side switch only turns on at

the beginning of a clock cycle when the voltage at the feed-

back pin falls below the reference voltage. Once the switch is

on, it stays on until the sensed current rises to the 25 mV

threshold

Fast Transient Response

When the output voltage fails to exceed 97% of the nominal

level, the low voltage regulation(LREG) comparator will set

the PWM logic to turn the high-side switch on at maximum

duty cycle. This improves transient response since it by-

passes the error amplifier and PWM comparator. During

start-up, the LREG is disabled.

Boost High-Side Gate Drive

A flying capacitor is used to bootstrap the power supply for

the high-side driver as illustrated in

Figure 1. The boost ca-

pacitor is charged from an internal voltage rail (about 5.5V)

through an internal diode when the synchronous rectifier

(low-side MOSFET) is on, and then boosts up the high-side

gate voltage to turn high-side MOSFET on at the beginning

of next cycle. The internal diode connecting between the VIN

pin and the CBOOT pin reduces the count of external com-

external charge pump circuitry can be used to boost the gate

voltage in order to reduce conduction loss. Details will be

discussed in the Application Circuits Section.

Supply Voltage for the LM2630

When 5V is available, it is recommended to connect LM2630

V

ond figure in Typical Performance Characteristics), and also

reduce power dissipation inside the IC. Since the 5V supply

is only used to power the LM2630 (including the gate charge

for the external MOSFETs), it only requires a small amount

of current.

Reference

ture. A 220 pF capacitor is recommended between the V

REF

pin and ground. The load at the V

100µA.

Frequency Control Pin (FADJ) and SYNC Pin

With the FADJ pin open, the switching frequency is 200 kHz.

The frequency can be increased by connecting a resistor be-

tween FADJ and ground. The device can also be synchro-

nized with an external CMOS or TTL logic clock in the range

from 200 kHz to 400 kHz. It is recommended to connect the

SYNC pin to ground if not used.

Protections

The current limit comparator provides the cycle-by-cycle cur-

rent limit function by turning off the high-side MOSFET

whenever the sensed current reaches 110 mV. A second

level of current limit is accomplished by the 80% low voltage

detector: if the load pulls the output voltage down below 80%

of the nominal value, the device will turn off the high-side

MOSFET and turn on the low-side MOSFET in a latched

condition. This protection feature is disabled during startup.

The latched condition can be reset by shutting the device

down and then powering it up. Built-in input undervoltage

lockout circuit will keep most of the internal function blocks

off until the input voltage rises to about 3.5V.

Soft Start

A capacitor at the SS pin provides the soft start feature.

When the regulator is first powered up, or when the SD pin

goes high, a 10µA current source charges up the SS capaci-

tor from the 0.6V clamping voltage. The switch duty cycle

starts with narrow pulses and gradually get wider as the SS

pin voltage ramps up to about 1.3V, above which the duty

cycle will be controlled by the maximum current limit until the

output voltage rises to the nominal value and the regulator

starts to operate in the normal current mode PWM control.

The LM2630 use a digital counter, referenced to the oscilla-

tor frequency, to set the soft start timeout. The timeout is de-

pendent on the switching frequency (timeout = 4096/F

the nominal value during this period, the device will latch it-

self off.

Power Good

The LM2630 provides a power good signal by monitoring the

voltage at the FB pin and compared the feedback voltage

with the V

window of the nominal value.

Design Procedure

Guidelines for selecting external components are discussed

in this section.

Inductor Selection

The most critical parameters for the inductor are the induc-

tance, peak current and the dc resistance. The inductance is

related to the switching frequency and the ripple current:

Higher switching frequency allows smaller inductor, but re-

duces the efficiency. A higher value of ripple current reduces

inductance, but increase the conductance loss, core loss,

current stress for the inductor and switch devices, and re-

quires a bigger output capacitor for the same output voltage

ripple requirement. A reasonable value is setting the ripple

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