RTL8308B

2002/01/23

Rev. 2.0

3

2. General Description

The RTL8308B is a 128-pin, low cost and ultra low power consumption 8-port 10/100M Ethernet switch controller.

It is integrated both with a 2M bit embedded DRAM, as a packet buffer, and an 8K entry address table. The

RTL8308B supports the reduced MII (RMII) interface. Only a single 50MHz oscillator is needed and the

EEPROM is optional, which can save BOM costs. In addition, the RTL8308B provides an LED display to indicate

a network loop existence.

The RTL8308B provides eight 10/100 Mbps RMII Ethernet ports. Each port can operate in 10 Mbps or 100 Mbps

data rate, and in full or half duplex mode. Speed, duplex, link status and flow control can be acquired by

periodically polling the status of the PHY devices via MDIO.

The address look-up table consists of an 8K entry hash table and a 128 entry CAM. The RTL8308B uses the

address hashing algorithm or direct mapping method to search destination MAC addresses from and record source

MAC addresses to the hash table. Data received from the MAC interface is stored in the external memory buffer.

The RTL8308B supports IEEE 802.3x full duplex flow control and half duplex back pressure control. The ability

of IEEE 802.3x flow control is auto-negotiated by writing the flow control ability via MDIO. The reversible

PHYAD order feature is provided to connect diverse external PHY devices for PCB layout.

The RTL8308B provides a loop detect LED for visual diagnostics when detecting the network loop. The Broadcast

storm filtering function is provided for unusual broadcast storm traffic.

The RTL8308B supports non-blocking 148800 packets/second wire speed forwarding rate and a special design to

resolve the head-of-line-blocking problem. The RTL8308B uses a 2-wire 24LC02 interface to access the external

serial EEPROM, which is not required. Only one 50MHz OSC is needed.

Realtek

RTL8308B

Quad-PHY

50MHz

OSC

EEPROM2

4LC02

Quad-PHY

10/100 Mbps x 8

Example of 8-port Switch System diagram