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MUX36S16IPWR Datasheet(PDF) 21 Page - Texas Instruments |
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MUX36S16IPWR Datasheet(HTML) 21 Page - Texas Instruments |
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21 / 38 page  VDD VDD VSS VSS MUX36S16 A0 A1 A2 VEN RS VS EN S1 GND CL 1 nF D VOUT VOUT VEN 3 V VOUT QINJ = CL × VOUT Copyright © 2016, Texas Instruments Incorporated 0 V A3 21 MUX36S16, MUX36D08 www.ti.com SLASED9 – NOVEMBER 2016 Product Folder Links: MUX36S16 MUX36D08 Submit Documentation Feedback Copyright © 2016, Texas Instruments Incorporated 7.9 Charge Injection The MUX36xxx have a simple transmission-gate topology. Any mismatch in capacitance between the NMOS and PMOS transistors results in a charge injected into the drain or source during the falling or rising edge of the gate signal. The amount of charge injected into the source or drain of the device is known as charge injection, and is denoted by the symbol QINJ. Figure 33 shows the setup used to measure charge injection. Figure 33. Charge-Injection Measurement Setup |
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