S9518 datasheet(2/8 Pages) SUMMIT

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S9518

2017-04 4/24/99

Analog Section

The S9518 is an 8-bit, voltage output digital-to-analog

converter (DAC). The DAC consists of a resistor network

that converts 8-bit digital values into equivalent analog

output voltages in proportion to the applied reference

voltage.

Reference Inputs

The voltage differential between the VL and VH inputs

sets the full-scale output voltage range. VL must be equal

to or greater than ground (a positive voltage). VH must be

greater than VL and less than or equal to VDD. See

specifications on page 5 for guaranteed operating limits.

Output Buffer Amplifier

The voltage output is from a precision unity-gain follower

that can slew up to 1V/

µs.

Digital Interface

The interface provides simple push button control of an

up/down counter that drives the DAC. The DAC output is

a ratiometric voltage output.

UP is an active low push-button input. An internal pull-up

resistor, with nominal value of 50kohm, eliminates an

external resistor that would be required with push button

control. A 30ms debounce period is included in the input

timing to prevent multiple pulsing of the counter. Either a

switch closure to ground or a LOW logic level will, after the

debounce time, change the potentiometer tap position.

UP moves the output voltage towards the VH reference

input. If the

UP push-button is kept depressed, the

counter will continue to increment at the rate of one count

every 250ms for one second. After one second the

PINOUT

DWN

GND

VDD

STR

VOUT

2017 ILL1.1

counter increments faster, one count every 50ms, until

the push-button is released. Changes to the DAC output

using the

UP input do not alter the data stored in

EEPROM. The

STR input updates the nonvolatile

EEPROM memory.

DWN

DWN is an active low push-button input that decrements

the counter and moves the potentiometer output voltage

towards the VL reference input. The DWN control input

also includes an internal 50kohm pull-up resistor and a

30ms debounce period to prevent multiple pulsing. A

LOW logic level will also change the potentiometer tap

position after the debounce period. If the

DWN push-

button is kept depressed, the counter continues to decre-

ment at the rate of one count every 250ms for one second.

After one second the counter decrements at one count

every 50ms until the push-button is released. Changes to

the DAC output using the

DWN input do not alter the data

stored in EEPROM.

STR

STR This input can be used in two ways:

1) If the input is tied LOW, then AUTOSTORE is en-

abled. When VDD powers-down an automatic store

cycle takes place that updates the nonvolatile

EEPROM memory.

STR is an active low push-button input that also

updates the nonvolatile memory. The input is

debounced but does not have an internal pull-up

resistor. For every valid push, the S9518 will store the

current potentiometer position to EEPROM.

PIN NAMES

Symbol

Description

PB Input, Moves VOUT Toward

VH Input

DWN

PB Input, Moves VOUT Toward

VL Input

Vref High

GND

Ground

VOUT

Trimmed Voltage Output

Vref Low

STR

Store Input, Providing a Control

Input to Initiate a Store Operation

VDD

Supply Voltage (2.7V to 5.5V)

2017 PGM T1.0

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