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ISO7740 Datasheet(PDF) 16 Page - Texas Instruments |
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ISO7740 Datasheet(HTML) 16 Page - Texas Instruments |
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16 / 41 page ![]() Ambient Temperature (qC) 0 50 100 150 200 0 100 200 300 400 500 600 D001 VCC1 = VCC2 = 2.75 V VCC1 = VCC2 = 3.6 V VCC1 = VCC2 = 5.5 V Ambient Temperature (qC) 0 50 100 150 200 0 50 100 150 200 250 300 350 400 450 D002 VCC1 = VCC2 = 2.75 V VCC1 = VCC2 = 3.6 V VCC1 = VCC2 = 5.5 V 16 ISO7740-Q1, ISO7741-Q1, ISO7742-Q1 SLLSEU0 – NOVEMBER 2016 www.ti.com Product Folder Links: ISO7740-Q1 ISO7741-Q1 ISO7742-Q1 Submit Documentation Feedback Copyright © 2016, Texas Instruments Incorporated (1) Also known as pulse skew. (2) tsk(o) is the skew between outputs of a single device with all driving inputs connected together and the outputs switching in the same direction while driving identical loads. (3) tsk(pp) is the magnitude of the difference in propagation delay times between any terminals of different devices switching in the same direction while operating at identical supply voltages, temperature, input signals and loads. 6.17 Switching Characteristics—2.5-V Supply VCC1 = VCC2 = 2.5 V ±10% (over recommended operating conditions unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT tPLH, tPHL Propagation delay time See Figure 15 7.5 12 18.5 ns PWD Pulse width distortion(1) |tPHL – tPLH| 0.2 5.1 ns tsk(o) Channel-to-channel output skew time(2) Same-direction Channels 4.1 ns tsk(pp) Part-to-part skew time(3) 4.6 ns tr Output signal rise time See Figure 15 1 3.5 ns tf Output signal fall time 1 3.5 ns tPHZ Disable propagation delay, high-to-high impedance output See Figure 16 22 40 ns tPLZ Disable propagation delay, low-to-high impedance output 22 40 ns tPZH Enable propagation delay, high impedance-to-high output for ISO774x-Q1 18 40 ns Enable propagation delay, high impedance-to-high output for ISO774x-Q1 with F suffix 3.3 8.5 μs tPZL Enable propagation delay, high impedance-to-low output for ISO774x-Q1 3.3 8.5 μs Enable propagation delay, high impedance-to-low output for ISO774x-Q1 with F suffix 18 40 ns tDO Default output delay time from input power loss Measured from the time VCC goes below 1.7 V. See 0.1 0.3 μs tie Time interval error 216 – 1 PRBS data at 100 Mbps 0.7 ns 6.18 Insulation Characteristics Curves Figure 1. Thermal Derating Curve for Safety Limiting Current for DW-16 Package Figure 2. Thermal Derating Curve for Safety Limiting Current for DBQ-16 Package |
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