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STM8AL3LE8x Datasheet(PDF) 22 Page - STMicroelectronics |
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STM8AL3LE8x Datasheet(HTML) 22 Page - STMicroelectronics |
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22 / 133 page  Functional overview STM8AL31E8x STM8AL3LE8x 22/133 DocID027180 Rev 5 3.12 System configuration controller and routing interface The system configuration controller provides the capability to remap some alternate functions on different I/O ports. TIM4 and ADC1 DMA channels can also be remapped. The highly flexible routing interface allows application software to control the routing of different I/Os to the TIM1 timer input captures. It also controls the routing of internal analog signals to ADC1, COMP1, COMP2, DAC1 and the internal reference voltage VREFINT. It also provides a set of registers for efficiently managing the charge transfer acquisition sequence. 3.13 AES The AES Hardware Accelerator can be used to encipher and decipher data using the AES algorithm (compatible with FIPS PUB 197, 2001 Nov 26). • Key scheduler • Key derivation for decryption • 128-bit data block processed • 128-bit key length • 892 clock cycles to encrypt/decrypt one 128-bit block AES data flow can be served by the DMA1 controller 3.14 Timers The high-density STM8AL3xE8x devices contain one advanced control timer (TIM1), three 16-bit general purpose timers (TIM2,TIM3 and TIM5) and one 8-bit basic timer (TIM4). All the timers are served by DMA1. Table 3 compares the features of the advanced control, general-purpose and basic timers. Table 3. Timer feature comparison Timer Counter resolution Counter type Prescaler factor DMA1 request generation Capture/compare channels Complementary outputs TIM1 16-bit up/down Any integer from 1 to 65536 Yes 3 + 1 3 TIM2 Any power of 2 from 1 to 128 2 None TIM3 TIM5 TIM4 8-bit up Any power of 2 from 1 to 32768 0 |
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