UCS1002-2 datasheet(82/114 Pages) MICROCHIP

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Programmable USB Port Power Controller with Charger Emulation

Datasheet

Revision 1.4 (07-16-13)

SMSC UCS1002

DATASHEET

10.4.5

High-speed Switch Configuration - 25h

The contents of this register are retained in Sleep.

Bit 4 - RESERVED - This bit will default to ‘1’. Changing this bit will have no effect.

Bit 3 - HSW_CUST - Enables the USB high-speed data switch to be active during the Custom

handshake. This control is checked at the beginning of charger emulation. Therefore, changing this

control during emulation will have no immediate effect. Upon restarting charger emulation (as a result

of the EM_RETRY bit being set, a Removal Detection event, or change of emulation controls), the

high-speed switch will close.



‘0’ (default) - The USB high-speed data switch is disabled while the Custom charger emulation

profile is applied.



‘1’ - The USB high-speed data switch is enabled while the Custom charger emulation profile is

applied. Also, if the Custom charger emulation profile is accepted during the Dedicated Charger

Emulation Cycle, the high-speed switch will stay closed.

Bit 2 - HSW_CDP - Enables the USB high-speed data switch to be active during the CDP handshake.

This control is checked at the beginning of charger emulation. Therefore, changing this control during

emulation will have no immediate effect. Upon restarting charger emulation (as a result of a Removal

Detection event or change of emulation controls), the high-speed switch will close.



‘0’ - The USB high-speed data switch is disabled during the CDP handshake.



‘1’ (default) - The USB high-speed data switch is enabled during the CDP handshake.

Bit 1 - HSW_DET - Enables the USB high-speed data switch to be active during the Detect power

state. If the S0 control is set to ‘0’, this bit is ignored.



‘0’ (default) - The USB high-speed data switch is open during the Detect power state.



‘1’ - The USB high-speed data switch will be closed during the Detect power state.

Bit 0 - HSW_DCE - Enables the USB high-speed data switch after the DCP charger emulation profile

or one of the Legacy charger emulation profiles was accepted during the DCE Cycle and the portable

device is charging. This bit is ignored if the UCS1002 is not in the Active state. This bit will not cause

the high-speed switch to be closed during emulation when the DCP and Legacy profiles are applied,

only after the DCP or a Legacy charger emulation profile has been accepted.



‘0’ (default) - The USB high-speed data switch will be open.



‘1’ - The USB high-speed data switch will be closed.

10.5

Current Limit Register

The Current Limit register controls the ILIM used by the port power switch. The default setting is based

on the resistor on the COMM_SEL / ILIM pin and this value cannot be changed to be higher than

hardware set value.

The contents of this register are retained in Sleep.

Table 10.11 Current Limit Register

ADDR

R/W

B7B6B5B4B3B2B1B0

DEFAULT

19h

R/W

Current Limit

-----

ILIM_SW[2:0]

Set by

COMM_SEL

/ ILIM

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