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74ALVC574 Datasheet(PDF) 8 Page - NXP Semiconductors

Part # 74ALVC574
Description  Octal D-type flip-flop positive edge-trigger 3-state
PDF  20 Pages
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Manufacturer  PHILIPS [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo PHILIPS - NXP Semiconductors

74ALVC574 Datasheet(HTML) 8 Page - NXP Semiconductors

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2002 Mar 04
8
Philips Semiconductors
Product specification
Octal D-type flip-flop; positive edge-trigger;
3-state
74ALVC574
AC CHARACTERISTICS
Note
1. All typical values are measured at Tamb =25 °C.
SYMBOL
PARAMETER
TEST CONDITIONS
Tamb (°C)
UNIT
WAVEFORMS
VCC (V)
−40 to +85
MIN.
TYP.(1)
MAX.
tPHL/tPLH
propagation delay CP to Qn
see Figs 6 and 9
1.65 to 1.95
1.0
3.1
6.4
ns
2.3 to 2.7
1.0
2.3
3.9
ns
2.7
1.0
2.5
3.6
ns
3.0 to 3.6
1.0
2.5
3.6
ns
tPZH/tPZL
3-state output enable time
OE to Qn
see Figs 8 and 9
1.65 to 1.95
1.0
3.2
6.4
ns
2.3 to 2.7
1.0
2.6
4.5
ns
2.7
1.0
3.2
4.6
ns
3.0 to 3.6
1.0
2.4
4.0
ns
tPHZ/tPLZ
3-state output disable time
OE to Qn
see Figs 8 and 9
1.65 to 1.95
1.5
3.6
7.0
ns
2.3 to 2.7
1.0
2.3
4.4
ns
2.7
1.5
2.9
4.4
ns
3.0 to 3.6
1.0
2.8
4.4
ns
tW
clock pulse with HIGH or LOW
see Figs 7 and 9
1.65 to 1.95
3.8
1.1
−
ns
2.3 to 2.7
3.3
0.9
−
ns
2.7
3.3
0.8
−
ns
3.0 to 3.6
3.3
1.2
−
ns
tsu
set-up time Dn to CP
see Figs 7 and 9
1.65 to 1.95
0.8
−0.1
−
ns
2.3 to 2.7
0.8
0.1
−
ns
2.7
0.8
0.3
−
ns
3.0 to 3.6
0.8
0.0
−
ns
th
hold time Dn to CP
see Figs 7 and 9
1.65 to 1.95
0.8
−0.1
−
ns
2.3 to 2.7
0.8
0.1
−
ns
2.7
0.8
0.4
−
ns
3.0 to 3.6
0.7
−0.1
−
ns
fmax
maximum clock pulse frequency see Figs 6 and 9
2.3 to 2.7
100
200
−
MHz
2.7
100
200
−
MHz
3.0 to 3.6
150
300
−
MHz



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