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INA1650IPW Datasheet(PDF) 7 Page - Texas Instruments |
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INA1650IPW Datasheet(HTML) 7 Page - Texas Instruments |
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7 / 39 page  0 5 10 15 20 25 30 Output Offset Voltage ( V) C001 0 5 10 15 20 25 Offset Voltage Drift (µV/ ƒC) C001 0 5 10 15 20 25 30 35 Input Resistance Mismatch (%) C001 0 5 10 15 20 25 30 35 Gain Error (%) C001 0 5 10 15 20 25 CMRR ( V/V) C001 0 5 10 15 20 25 CMRR ( V/V) C001 7 INA1650 www.ti.com SBOS818 – DECEMBER 2016 Product Folder Links: INA1650 Submit Documentation Feedback Copyright © 2016, Texas Instruments Incorporated 6.6 Typical Characteristics at TA = 25°C, VS = ±18 V, VCM = VOUT = midsupply, and RL = 2 kΩ (unless otherwise noted) 5746 Channels VREF Pins Connected to Ground Figure 1. Common-Mode Rejection Ratio Distribution 5746 Channels VREF Pins Connected to VMID(OUT) Figure 2. Common-Mode Rejection Ratio Distribution 5746 Channels Figure 3. Distribution of Mismatch in 500-kΩ Input Resistors 5746 Channels Figure 4. Gain Error Distribution 5746 Channels Figure 5. Offset Voltage Distribution 52 Channels Figure 6. Offset Voltage Drift Distribution |
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