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ISO5852S Datasheet(PDF) 21 Page - Texas Instruments |
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ISO5852S Datasheet(HTML) 21 Page - Texas Instruments |
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21 / 43 page ![]() tMute tRST RST-rising edge turns FLT high tDS(FLT) tLEB VDSTH tDS(10%) 10% 90% tDS(90%) Inputs blocked Inputs released IN+ (IN± = GND1) VOUTH/L DESAT FLT RST RDY The inputs are muted for 5 µs by internal circuit after DESAT is detected. RDY is also low until the mute time. FLT can be reset, only if RDY goes high. 21 ISO5852S-EP www.ti.com SLLSEW1 – DECEMBER 2016 Product Folder Links: ISO5852S-EP Submit Documentation Feedback Copyright © 2016, Texas Instruments Incorporated Parameter Measurement Information (continued) Figure 46. DESAT, OUTH/L, FLT, RST Delay |
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