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L1806G-SH2-R Datasheet(PDF) 2 Page - Unisonic Technologies |
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L1806G-SH2-R Datasheet(HTML) 2 Page - Unisonic Technologies |
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2 / 7 page ![]() L1806 CMOS IC UNISONICTECHNOLOGIESCO.,LTD 2 of 7 www.unisonic.com.tw QW-R102-063.b MARKING HSOP-8 DFN-10(3×3) PIN CONFIGURATION 1 NC 2 3 4 56 7 8 9 10 VOUT NC FB PG EN NC VIN NC VCNTL GND Top View DFN-10(3×3) HSOP-8 GND 1 2 3 45 6 7 8 PG EN VIN VCNTL NC VOUT FB GND 11 PIN DESCRIPTION PIN NO. HSOP-8 DFN-10(3×3) PIN NAME DESCRIPTION 1 5 PG Power Good.Output open drain to indicate the status of VOUT via monitoring the FB pin. This pin is pulled low when the voltage is outside the limits, during thermal shutdown and if either VCNTL or VIN go below their thresholds. 2 6 EN Enable Pin. Driving this pin low will disable the part. When left floating an internal current source will pull this pin high and enable it. 3 8 VIN Power Input Pin for current supply. Connect a decoupling capacitor (≥10µF) as close as possible to the pin for noise filtering 4 10 VCNTL BIAS supply for the controller, recommended 5V. Connect a decoupling capacitor (≥1µF) as close as possible to the pin for noise filtering. 5 1, 3, 7,9 NC No Connection 6 2 VOUT Power output pin 7 4 FB Feedback to set the output voltage via an external resistor divider between VOUT and GND 8 11 GND Ground |
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