V61308P datasheet(2/12 Pages) ETC

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Absolute Maximum Ratings

Parameter

Symbol Conditions

Maximum voltage at VDD

VDDmax

VSS + 8 V

Minimum voltage at VDD

VDDmin

VSS - 0.3 V

Max. voltage at any signal pin

VMAX

VDD+ 0.3 V

Min. voltage at any signal pin

VMIN

VSS - 0.3 V

Storage temperature

TSTO

-65 to +150 °C

Electrostatic discharge max. to

MIL-STD-883C method 3015

VSmax

1000V

Max. soldering conditions

TSmax

250 °C x 10 s

Table 1

Stresses above these listed maximum ratings may cause

permanent damage to the device. Exposure beyond

specified operating conditions may affect device reliabil-

ity or cause malfunction.

Handling Procedures

This device has built-in protection against high static volt-

ages or electric fields; however, anti-static precautions

must be taken as for any other CMOS component. Unless

otherwise specified, proper operation can only occur

when all terminal voltages are kept within the supply volt-

age range. Unused inputs must always be tied to a de-

fined logic voltage level.

Operating Conditions

Parameter

Symbol Min. Max. Units

Operating temperature 1)

-40

+125

°C

Supply voltage 2)

VDD

1.2

RES & EN guaranteed 3)

VDD

1.2

Comparator input voltage

VIN

VDD

RC-oscillator programming

1000

Ω

Table 2

1) The maximum operating temperature is confirmed by sampling

at initial device qualification. In production, all devices are

tested at +85 °C. On request devices tested at +125 °C can

be supplied.

2) A 100 nF decoupling capacitor is required on the supply

voltage VDD for stability.

3) RES must be pulled up externally to VDD event if it is unused.

(Note: RES and EN are used as inputs by EM test.)

V6130

Electrical Characteristics

3.0

≤ VDD ≤ 5.5 V, C = 100 nF, TA = -40 to +85 °C, unless otherwise specified

Parameter

Symbol Test Conditions

Min.

Typ.

Max.

Unit

Supply current in standby mode

ISS

REXT = don’t care, TCL = VDD,

VIN = 0 V

µA

Supply current

ISS

REXT = 100 kΩ, I/Ps at VDD,

O/Ps 1 M

Ω to VDD

100

µA

RES and EN

Output Low Voltage

VOL

VDD = 4.5 V, IOL = 20 mA

0.4

VOL

VDD = 4.5 V, IOL = 8 mA

0.2

0.4

VOL

VDD = 2.0 V, IOL = 4 mA

0.2

0.4

VOL

VDD = 1.2 V, IOL = 0.5 mA

0.06

0.2

Output High Voltage

VOH

VDD = 4.5 V, IOH = -1 mA

3.5

4.1

VOH

VDD = 2.0 V, IOH = -100 µA

1.8

1.9

VOH

VDD = 1.2 V, IOH = -30 µA

1.0

1.1

TCL and VIN

TCL input low level

VIL

VSS

0.8

TCL input high level

VIH

2.0

VDD

Leakage current TCL input

ILI

VSS ≤ VTCL ≤ VDD

0.05

µA

VIN input resistance

RVIN

100

Ω

Comparator reference1)

VREF

TA = +25 °C

1.148

1.170

1.200

VREF

TA = -20 to +70 °C

1.123

1.218

VREF

1.123

1.222

Comparator hysteresis1)

VHY

Table 3

1) The comparator reference is the power-down reset threshold. The power-on reset threshold equals the comparator reference

voltage plus the comparator hysteresis (see Fig.5).

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