LM4840 datasheet(11/19 Pages) NSC

11 / 19 page

Application Information (Continued)

level without forced air cooling. In all circumstances and

conditions, the junction temperature must be held below

150˚C to prevent activating the LM4840’s thermal shutdown

protection. The LM4840’s power derating curve in the Typi-

cal Performance Characteristics shows the maximum

power dissipation versus temperature. Further detailed and

specific information concerning PCB layout, fabrication, and

mounting an LQ (LLP) package is available in National

Semiconductor’s AN1187.

POWER DISSIPATION

Power dissipation is a major concern when using any power

amplifier and must be thoroughly understood to ensure a

successful design. Equation 1 states the maximum power

dissipation point for a single-ended amplifier operating at a

given supply voltage and driving a specified load.

DMAX =(VDD)

2/(2

π 2R

(1)

However, a direct consequence of the increased power de-

livered to the load by a bridged amplifier is an increase in

internal power dissipation. Equation 2 states the maximum

power dissipation point for a bridged amplifier operating at a

given supply voltage and driving a specified load.

DMAX = 4(VDD)

2/(2

π 2R

(2)

Since theLM4840 is a stereo power amplifier, the maximum

internal power dissipation is two times that of Equation 1 or

Equation 2 depending on the mode of operation. Even with

the power dissipation of the stereo amplifiers, the LM4840

does not require heatsinking. The power dissipation from the

amplifiers, must not be greater than the package power

dissipation that results from Equation 3:

DMAX =(TJMAX −TA)/ θ JA

(3)

For the LM4840 TSSOP package,

JA = 80˚C/W and TJMAX

= 150˚C. Depending on the ambient temperature, T

A,ofthe

system surroundings, Equation 3 can be used to find the

maximum internal power dissipation supported by the IC

packaging. If the result of Equation 1 and 2 is greater than

that of Equation 3, then either the supply voltage must be

decreased, the load impedance increased, or the ambient

temperature reduced. For the typical application of a 5V

power supply, with an 8

Ω bridged loads, the maximum am-

bient temperature possible without violating the maximum

junction temperature is approximately 48˚C provided that

device operation is around the maximum power dissipation

points. Power dissipation is a function of output power and

thus, if typical operation is not around the maximum power

dissipation point, the ambient temperature can be increased.

Refer to the Typical Performance Characteristics curves

for power dissipation information for different output powers.

LAYOUT

As stated in the Grounding section, placement of ground

return lines is imperative in maintaining the highest level of

system performance. It is not only important to route the

correct ground return lines together, but also to be aware of

where the ground return lines are routed with respect to each

other. The output load ground returns should be physically

located as far as possible from low signal level lines and their

ground return lines.

Ω and 4Ω Layout Considerations

With low impedance loads, the output power at the loads is

heavily dependent on trace resistance from the output pins

of the LM4840. Traces from the output of the LM4840MH to

the load or load connectors should be as wide as practical.

Any resistance in the output traces will reduce the power

delivered to the load. For example, with a 4

Ω load and 0.1Ω

of trace resistance in each output, output power at the load

drops from 2W to 1.8W.

Output power is also dependent on supply regulation. To

keep the supply voltage from sagging under full output con-

ditions, the supply traces should be as wide as practical.

Grounding

In order to achieve the best possible performance, there are

certain grounding techniques to be followed. All input refer-

ence grounds should be tied with their respective source

grounds and brought back to the power supply ground sepa-

rately from the output load ground returns. Bringing the

ground returns for the output loads back to the supply sepa-

rately will keep large signal currents from interfering with the

stable AC input ground references. The exposed-DAP of the

LM4840MH package must be tied to ground.

POWER SUPPLY BYPASSING

As with any power amplifier, proper supply bypassing is

critical for low noise performance and high power supply

rejection. The capacitor location on both the bypass and

power supply pins should be as close to the device as

possible. The effect of a larger half supply bypass capacitor

is improved PSRR due to increased half-supply stability.

Typical applications employ a 5 volt regulator with 10 µF and

a 0.1 µF bypass capacitors which aid in supply stability, but

do not eliminate the need for bypassing the supply nodes of

the LM4840. The selection of bypass capacitors, especially

, is thus dependant upon desired PSRR requirements,

click and pop performance as explained in the section,

Proper Selection of External Components, system cost,

and size constraints. It is also recommended to decouple

each of the V

DD pins with a 0.1µF capacitor to ground.

PROPER SELECTION OF EXTERNAL COMPONENTS

Proper selection of external components in applications us-

ing integrated power amplifiers is critical to optimize device

and system performance. While the LM4840 is tolerant of

external component combinations, consideration to compo-

nent values must be used to maximize overall system qual-

ity.

The LM4840’s bridged amplifier should be used in low gain

configurations to minimize THD+N values, and maximize the

signal to noise ratio. Low gain configurations require large

input signals to obtain a given output power. Input signals

equal to or greater than 1Vrms are available from sources

such as audio codecs.

Besides gain, one of the major considerations is the closed-

loop bandwidth of the amplifier. To a large extent, the band-

width is dictated by the choice of external components. Both

the input coupling capacitor, C

I, and the output coupling

capacitor form first order high pass filters which limit low

frequency response given in Equations 4 and 5.

IC = 1/(2πRiCi)

(4)

OC = 1/(2πRLCO)

(5)

These values should be chosen based on required fre-

quency response.

Selection of Input and Output Capacitor Size

Large input and output capacitors are both expensive and

space hungry for portable designs. Clearly, a certain sized

capacitor is needed to couple in low frequencies without

LM4840 Datasheet(PDF) 11 Page - National Semiconductor (TI)

LM4840 Datasheet(HTML) 11 Page - National Semiconductor (TI)

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19

Datasheet Download

Link URL