TELEFUNKEN Semiconductors

U2794B

Rev. A3: 23.08.1995

4 (11)

Electrical Characteristics

W, fiLO = 950 MHz, PiLO = –10 dBm

Parameters

Test Conditions / Pins

Symbol

Min.

Typ.

Max.

Unit

I/O outputs

Emitter follower

I = 0.6 mA

I, IX / Q,

QX

3 dB-bandwidth

w/o external C

Note 5

Pins 1, 2, 19 and 20

BWI/Q

≥ 30

MHz

I/Q amplitude

imbalance

Pins 1, 2, 19 and 20

AII/Q

≤±0.2

dB

I/Q quadrature error

Pins 1, 2, 19 and 20

QEI/Q

≤±1.5

Deg

I/Q maximum output

swing

Pins 1, 2, 19 and 20

W

Max I/Q

2

DC output voltage

Pins 1, 2, 19 and 20

VOUT

2.8

V

DC output offset voltage Note 6

Pins 1, 2, 19 and 20

VOFSI/Q

I/IX

Q/QX

< 5

mV

Output impedance

Pins 1, 2, 19 and 20

see figure 6

Zout

50

W

Gain control, GC

Control range power

gain, gain high/gain low

Pin 11

Note 7

GCR

PGH/GGL

25

23/–2

dB

Switch voltage

“Gain high”

Pin 11

GCVHigh

1

V

“Gain low”

Note 8

Pin 11

GCVLow

V

Settling time, ST

Power “OFF ” – “ON ”

STON

< 4

ms

Power “ON ” – “OFF ”

STOFF

< 4

ms

Note 5: Due to test board parasitics this bandwidth is reduced and not equal for I, IX, Q, QX.

If symmetry and full bandwidth is required the lowpass Pins 3, 4 and 9, 10 should be isolated from the board.

The bandwidth of the I/Q outputs can be increased further by using a resistor between the Pins 3, 4, 9 and 10.

This resistors shunt the internal loads of RI

 5.4 kW The decrease in gain here has to be considered.

Note 6: Output emitter follower internal acurrent I = 0.6 mA allows only small voltage swing with a 50

W load.

For low signal distortion the load impedance should be RI

≥ 5 kW

Note 7: Referred to the level of the output vector

I

2

Note 8: The low gain status is achieved with an open or high ohmic Pin 11. A recommended application circuit for

switching between high and low gain status is shown in figure 1.