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HMC1197LP7FE Datasheet(PDF) 38 Page - Analog Devices

Part # HMC1197LP7FE
Description  Fixed Wireless or WLL
PDF  57 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

HMC1197LP7FE Datasheet(HTML) 38 Page - Analog Devices

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For price, delivery, and to place orders: Hittite Microwave Corporation, 2 Elizabeth Drive, Chelmsford, MA 01824
Phone: 978-250-3343
Fax: 978-250-3373
Order On-line at www.hittite.com
Application Support: Phone: 978-250-3343 or apps@hittite.com
HMC1197LP7FE
v03.0314
Wideband direct Quadrature Modulator
w/ Fractional-n Pll & Vco, 100 - 4000 MHz
38
2.0
Pll register Map
2.1
reg 00h id register (read only) deFault c7701a h
Bit
Type
Name
Width
Default
Description
[23:0]
RO
chip_ID
24
C7701A
Chip ID Number
2.2
reg 00h open Mode read address/rSt Strobe register (Write only)
Bit
Type
Name
Width
Default
Description
[4:0]
WO
Read Address
5
-
(WRITE ONLY) Read Address for next cycle
[5]
WO
Soft Reset
1
-
(WRITE ONLY) Soft Reset - (set to 0 during operation)
[23:6]
WO
Not Defined
18
-
Not Defined (set to write 0h)
2.3
reg 01h chip enable register deFault 3h
Bit
Type
Name
Width
Default
Description
[0]
R/W
Chip Enable Pin Select
1
1
1 = Chip enable via CHIP_EN pin, Reg 01h[0]=1 and
CHIP_EN pin low places the HMC1197LP7FE in Power
Down Mode
0 = Chip enable via SPI - Reg 01h[0] = 0, CHIP_EN pin
ignored (see Power Down Mode description for more
details)
[1]
R/W
SPI Chip Enable
1
1
Controls Chip Enable (Power Down) if Reg 01h[0] =0
Reg 01h[0]=0 and Reg 01h[1]=1 - chip is enabled, CHIP_
EN pin don’t care
Reg 01h[0]=0 and Reg 01h[1]=0 - chip disabled, CHIP_EN
pin don’t care
(see Power Down Mode description for more information)
[2]
R/W
Keep Bias On
1
0
keeps internal bias generators on, ignores Chip enable
control
[3]
R/W
Keep PFD Pn
1
0
keeps PFD circuit on, ignores Chip enable control
[4]
R/W
Keep CP On
1
0
keeps Charge Pump on, ignores Chip enable control
[5]
R/W
Keep Reference Buffer ON
1
0
keeps Reference buffer block on, ignores Chip enable
control
[6]
R/W
Keep VCO on
1
0
keeps VCO divider buffer on, ignores Chip enable control
[7]
R/W
Keep GPO Driver ON
1
0
keeps GPO output Driver ON, ignores Chip enable control
[9:8]
R/W
Reserved
2
0
reserved
2.4
reg 02h reFdiV register deFault 1h
Bit
Type
Name
Width
Default
Description
[13:0]
R/W
rdiv
14
1
Reference Divider ’R’ Value (EQ 8)
min 1
max max 214-1 = 3FFFh = 16383d
2.5
reg 03h Frequency register - integer Part deFault 19h
Bit
Type
Name
Width
Default
Description
[18:0]
R/W
Integer Setting
19
25d
19h
Divider Integer part, used in all modes, see (EQ 10)
Fractional Mode
min 20d
max 219 - 4 = 7FFFCh = 524,284d
Integer Mode
min 16d
max 219-1 = 7FFFFh = 524,287d
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
For price, delivery, and to place orders: Analog Devices, Inc.,
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106
Phone: 781-329-4700 • Order online at www.analog.com
Application Support: Phone: 1-800-ANALOG-D



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