Integrated

Circuit

Systems, Inc.

ICS93712

Advance Information

Block Diagram

2 DIMM DDR Fanout Buffer

93712 Rev - 9/08/00

Pin Configuration

28-Pin SSOP

RecommendedApplication:

DDR fan out buffer for VIA PRO 266 DDR chipset

Product Description/Features:

•

Low skew, fanout buffer

•

1 to 6 differential clock distribution

•

Feedback pin for input to output synchronization

•

Supports up to 2 DDR DIMMs

•

Frequency support for up to 400MHz DDR, SDRAMs

•

CMOS level control signal input

Switching Characteristics:

•

OUTPUT - OUTPUT skew: <100ps

•

Output Rise and Fall Time for DDR outputs: 650ps - 950ps

•

DUTYCYCLE:47%-53%

•

Pulse Skew: <100ps

ADVANCE INFORMATION documents contain information on products

in the formative or design phase development. Characteristic data and

other specifications are design goals. ICS reserves the right to change or

discontinue these products without notice.

SCLK

SDATA

BUF_IN

Control

Logic

FB_OUT

DDRT0

DDRT1

DDRT1

DDRT3

DDRT4

DDRT5

DDRC0

DDRC1

DDRC2

DDRC3

DDRC4

DDRC5

FBOUT

GND

DDRT0

DDRC0

VDD2.5

GND

DDRT1

DDRC1

VDD2.5

BUF_IN

GND

DDRT2

DDRC2

VDD2.5

GND

DDRT5

DDRC5

VDD2.5

GND

DDRT4

DDRC4

VDD2.5

GND

DDRT3

DDRC3

VDD2.5

SCLK

SDATA

1

2

3

4

5

6

7

8

9

10

11

12

13

14

28

27

26

25

24

23

22

21

20

19

18

17

16

15