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IR22141SS Datasheet(PDF) 17 Page - International Rectifier |
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IR22141SS Datasheet(HTML) 17 Page - International Rectifier |
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17 / 28 page ![]() 17 IR2214/IR22141(SS) www.irf.com ADVANCE DATA It must be noted that while in Soft Shut Down, both Under Voltage fault and external Shut Down (SD) are masked until the end of SSD. Desaturation protection is working independently by the other entire control pin and it is disabled only when the output status is off. VCC LIN HIN FLT_CLR VB HOP HON SSH DSH VS LOP LON SSL DSL COM VSS SY_FLT FAULT/SD VCC LIN HIN FLT_CLR VB HOP HON SSH DSH VS LOP LON SSL DSL COM VSS SY_FLT FAULT/SD VCC LIN HIN FLT_CLR VB HOP HON SSH DSH VS LOP LON SSL DSL COM VSS SY_FLT FAULT/SD phase U phase V phase W FAULT 4.2.2 Fault management in multi-phase systems In a system with two or more gate drivers the IR2214 devices must be connected as in figure 15. SY_FLT. The bi-directional SY_FLT pins communicate each other in the local network. The logic signal is active low. The device that detects the IGBT desaturation activates the SY_FLT, which is then read by the other gate drivers. When SYS_FLT is active all the drivers hold their output state regardless the input signals (H IN, LIN) they receive from the controller (freeze state). This feature is particularly important in phase- to-phase short circuit where two IGBTs are involved; in fact, while one is softly shutting-down, the other must be prevented from hard shutdown to avoid vanishing SSD. In the Freeze state the frozen drivers are not completely inactive because desaturation detection still takes the highest priority. SY_FLT communication has been designed for creating a local network between the drivers. There is no need to wire SY_FLT to the controller. FAULT/SD The bi-directional FAULT/SD pins communicates each other and with the system controller. The logic signal is active low. When low, the FAULT/SD signal commands the outputs to go off by hard shutdown. There are three events that can force FAULT/SD low: 1. Desaturation detection event: the FAULT\SD pin is latched low when SSD is over, and only a FLT_CLR signal can reset it. Figure 15: IR2214 application in 3ph system. |
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