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CYW43364 Datasheet(PDF) 13 Page - Cypress Semiconductor

Part # CYW43364
Description  Single-band 2.4 GHz IEEE 802.11b/g/n
PDF  68 Pages
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Manufacturer  CYPRESS [Cypress Semiconductor]
Direct Link  http://www.cypress.com
Logo CYPRESS - Cypress Semiconductor

CYW43364 Datasheet(HTML) 13 Page - Cypress Semiconductor

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Document Number: 002-14781 Rev. *C
Page 13 of 68
PRELIMINARY
CYW43364
3.3 External 32.768 kHz Low-Power Oscillator
The CYW43364 uses a secondary low-frequency sleep clock for low-power mode timing. Either the internal low-precision LPO or an
external 32.768 kHz precision oscillator is required. The internal LPO frequency range is approximately 33 kHz ± 30% over process,
voltage, and temperature, which is adequate for some applications. However, one trade-off caused by this wide LPO tolerance is a
small current consumption increase during power save mode that is incurred by the need to wake up earlier to avoid missing beacons.
Whenever possible, the preferred approach is to use a precision external 32.768 kHz clock that meets the requirements listed in Table
4 on page 13.
Note: The CYW43364 will auto-detect the LPO clock. If it senses a clock on the EXT_SLEEP_CLK pin, it will use that clock. If it
doesn't sense a clock, it will use its own internal LPO.
■ To use the internal LPO: Tie EXT_SLEEP_CLK to ground. Do not leave this pin floating.
■ To use an external LPO: Connect the external 32.768 kHz clock to EXT_SLEEP_CLK.
Table 4. External 32.768 kHz Sleep-Clock Specifications
Parameter
LPO Clock
Units
Nominal input frequency
32.768
kHz
Frequency accuracy
±200
ppm
Duty cycle
30–70
%
Input signal amplitude
200–3300
mV, p-p
Signal type
Square wave or sine wave
–
Input impedancea
a. When power is applied or switched off.
>100
kΩ
<5
pF
Clock jitter
<10,000
ppm



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