UCC28083, UCC28084, UCC28085, UCC28086

UCC38083, UCC38084, UCC38085, UCC38086

SLUS488B − SEPTEMBER 2002 − REVISED MAY 2003

2

www.ti.com

ORDERING INFORMATION

THERMAL RESISTANCE TABLE

PACKAGE

θjc(°C/W)

θja(°C/W)

SOIC−8 (D)

42

84 to 160(1)

PDIP−8 (P)

50

110(1)

TSSOP−8 (PW)

32(2)

232 to 257(2)

NOTES: (1) Specified

θja (junction to ambient) is for devices mounted to 5-inch2 FR4 PC board

with one ounce copper where noted. When resistance range is given, lower values

are for 5 inch2 aluminum PC board. Test PWB was 0.062 inch thick and typically

used 0.635-mm trace widths for power packages and 1.3-mm trace widths for

non-power packages with a 100-mil x 100-mil probe land area at the end of each

trace.

(2). Modeled data. If value range given for

θja, lower value is for 3x3 inch. 1 oz internal

copper ground plane, higher value is for 1x1-inch. ground plane. All model data

assumes only one trace for each non-fused lead.

AVAILABLE OPTIONS

TA

INTERNAL

SOFT START

UVLO

PACKAGES

TA

INTERNAL

SOFT START

ON

OFF

SOIC-8 (D)

PDIP-8 (P)

TSSOP-8 (PW)

3.5 ms

12.5 V

8.3 V

UCC28083D

UCC28083P

UCC28083PW

−40

°C to 85°C

3.5 ms

4.3 V

4.1 V

UCC28084D

UCC28084P

UCC28084PW

−40

°C to 85°C

75

µs

12.5 V

8.3 V

UCC28085D

UCC28085P

UCC28085PW

75

µs

4.3 V

4.1 V

UCC28086D

UCC28086P

UCC28086PW

3.5 ms

12.5 V

8.3 V

UCC38083D

UCC38083P

UCC38083PW

0

°C to 70°C

3.5 ms

4.3 V

4.1 V

UCC38084D

UCC38084P

UCC38084PW

0

°C to 70°C

75

µs

12.5 V

8.3 V

UCC38085D

UCC38085P

UCC38085PW

75

µs

4.3 V

4.1 V

UCC38086D

UCC38086P

UCC38086PW

† The D and PW packages are available taped and reeled. Add R suffix to device type, e.g. UCC28083DR (2500 devices

per reel) or UCC38083PWR (2000 devices per reel).

1

2

3

4

8

7

6

5

CTRL

ISET

CS

RT

VDD

OUTA

OUTB

GND

D OR P PACKAGE

(TOP VIEW)

1

2

3

4

8

7

6

5

PW PACKAGE

(TOP VIEW)

OUTB

GND

RT

CS

OUTA

VDD

CTRL

ISET