TPS76201

LOW OUTPUT ADJUSTABLE

ULTRALOW-POWER 100-mA LDO LINEAR REGULATOR

SLVS323A – FEBRUARY 2001 – REVISED MAY 2001

8

POST OFFICE BOX 655303

APPLICATION INFORMATION

output voltage programming

The output voltage of the TPS76201 adjustable regulator is programmed using an external resistor divider as

shown in Figure 18. The output voltage is calculated using:

V

O +

V

ref

1

) R1

R2

(1)

Where:

Resistors R1 and R2 should be chosen for approximately 10-

µA divider current. Lower value resistors can be

used but offer no inherent advantage and waste more power. Higher values should be avoided as leakage

currents at FB increase the output voltage error. The recommended design procedure is to choose

R2 = 66.5 k

Ω to set the divider current at 10 µA and then calculate R1 using:

R1

+

V

O

V

ref

* 1

R2

(2)

VO

VI

OUT

FB

R2

GND

EN

IN

TPS76201

1

µF

OUTPUT

VOLTAGE

(V)

R1

R2

0.7

0.9

1.2

1.5

1.8

2.5

3.3

3.6

4

5

3.36

23.2

53.6

83.5

113

182

246

294

332

432

66.5

66.5

66.5

66.5

66.5

66.5

66.5

66.5

66.5

66.5

OUTPUT VOLTAGE

PROGRAMMING GUIDE

DIVIDER RESISTANCE

(k

Ω)‡

‡ 1% values shown.

3

1

4

2

R1

5

ESR = 0.5

Ω

4.7

µF

Figure 18. TPS76201 Adjustable LDO Regulator Programming