Silicon Oscillator with Low-Power

Frequency Switching and Reset Output

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7

ENABLE Input

The MAX7378 has an active-high enable input that con-

trols the clock and reset outputs. The clock output is

driven high when disabled. The reset asserts when dis-

abled (low for active-low reset, high for active-high

reset). Drive ENABLE low to disable the clock output on

the next rising edge. Drive ENABLE high to activate the

clock output.

Clock-Speed Select Input

The MAX7378 uses logic input pin, SPEED, to set clock

speed. Take this pin low to select slow clock speed

(nominally 32.768kHz) or high to select full clock

GND to select fast or slow clock speed, or connected

to a logic output (such as a processor port) used to

change clock speed on the fly. If the SPEED input is

connected to a processor port that powers up in the

input condition, connect a pullup or pulldown resistor to

the SPEED input to set the clock to the preferred speed

on power-up. The leakage current through the resistor

into the SPEED input is very low, so a resistor value as

high as 500k

Ω may be used.

Applications Information

Interfacing to a Microcontroller

Clock Input

The MAX7378 clock output is a push-pull, CMOS logic

output that directly drives any µP or µC clock input.

There are no impedance-matching issues when using

the MAX7378. The MAX7378 is not sensitive to its posi-

tion on the board and does not need to be placed right

other clock-input device) to the same supply voltage

level. Refer to the µC data sheet for clock-input compati-

bility with external clock signals. The MAX7378 requires

no biasing components or load capacitance. When

using the MAX7378 to retrofit a crystal oscillator, remove

all biasing components from the oscillator input.

RST Reset Output Options

The MAX7378 is available with three reset output stage

options: push-pull with active-low output, push-pull with

active-high output, and open drain with active-low out-

put. The RST output is asserted when the monitored

remains asserted for 100µs after the monitored input

RST output requires an external pullup resistor.

Output Jitter

The MAX7378’s jitter performance is given in the

Electrical Characteristics table as a peak-to-peak value

obtained by observing the output of the MAX7378 for

20s with a 500MHz oscilloscope. Jitter values are

approximately proportional to the period of the output

frequency of the device. Thus, a 4MHz part has

approximately twice the jitter value of an 8MHz part.

The jitter performance of clock sources degrades in the

presence of mechanical and electrical interference.

The MAX7378 is relatively immune to vibration, shock,

and EMI influences, and thus provides a considerably

more robust clock source than crystal or ceramic res-

onator-based oscillator circuits.

Initial Power-Up and Operation

An intial power-up reset holds the reset output active for

100µs (typ). However, the clock starts up within 30µs

(typ) at the frequency determined by the SPEED pin.

Power-Supply Brownout

ping below the reset threshold and then rising back

above the threshold asserts RST and starts a normal

RST/RST

LOGIC

600kHz TO 10MHz

(HF OSCILLATOR)

POR

MUX

CLOCK

SPEED

ENABLE

MAX7378

32kHz

(LF OSCILLATOR)

Figure 1. Functional Diagram