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LM9040 Datasheet(PDF) 4 Page - National Semiconductor (TI) |
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LM9040 Datasheet(HTML) 4 Page - National Semiconductor (TI) |
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4 / 10 page ![]() Circuit Description The LM9040 is fabricated in CMOS technology and is de- signed to operate from a single well regulated 5V supply The IC consists of two independent differential amplifiers which are designed using two-phased switched capacitor networks (SCN) The differential inputs have a common mode operating range of 2V above and below ground The SCN includes the input sampling the lowpass filter cold sensor bias voltage and the gain circuitry Each amplifier has an independent voltage comparator to detect an open inverting input pin Additional support circuitry includes the oscillator clock generator and VBB bias generator TLH12372 – 13 FIGURE 3 Simplified Circuit Oscillator The device contains an internal oscillator which is used to drive the internal two-phase clock generator The oscillator requires an external resistor value of 178 kX from the ‘‘OSC RES’’ pin to device VCC This resistor value deter- mines the charge rate of the internal capacitor and thus sets the oscillator frequency The internal oscillator capaci- tor is matched to the switched capacitor networks so that the absolute capacitance values are not as important as is the absolute ratios of the capacitors The oscillator frequen- cy is approximately 200 kHz The oscillator resistor should be located as close to the OSC RES pin as possible Any variation of the oscillator resistor value any stray capacitance on the OSC RES pin or any changes in the supply voltage will result in a change in the oscillator frequency This will directly affect the device Differential Input Impedance and Low Pass filter response Additional circuitry takes the oscillator signal and generates two non-overlapping clock signals and a CLK OUT signal The clock signals operate at one half the oscillator frequen- cy or typically 100 kHz This results in a Nyquist frequency of typically 50 kHz Clock OutClock In For the input stage to work with common mode voltages below Ground potential a negative bias voltage (VBB)is needed The CLK OUT pin is used to provide the AC sig- nal needed to drive the internal VBB bias generator through an external coupling capacitor A minimum coupling capaci- tor value of 100 pF to a maximum value of 01 mF is recom- mended The CLK IN pin is the input to the VBB bias gen- erator circuitry Differential Input Circuit The input stage can be best described as a switched Sam- ple and Difference circuit (see Figure 4 ) When the input capacitor CIN is switched to the non-inverting input the in- put voltage plus the common mode voltage is stored on CIN When CIN is switched to the inverting input CIN will be dis- charged by an amount equal to the common mode voltage The remaining charge across CIN will be equal to the differ- ential input voltage and a proportional charge will be trans- ferred through the virtual ground via the gain stage TLH12372 – 14 FIGURE 4 Simplified Switched Capacitor Input Circuit 4 |
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