6

PS8590C

09/22/04

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PI6C2972

Low Voltage PLL Clock Driver

Notes:

8. tpd is specified for a 50 MHz input reference. The window will shrink/grow proportionally from the minimum limit with shorter/

longer input reference periods. The tpd does not include jitter.

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Notes:

5. Maximum input reference frequency is limited by the VCO lock range and the feedback divider or 100 MHz,

minimum input reference frequency is limited by the VCO lock range and the feedback divider.

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