IR2085STRPBF datasheet(6/9 Pages) IRF

6 / 9 page

IR2085S& (PbF)

www.irf.com

Pin descriptions

CS: The input pin to the overcurrent comparator. Ex-

ceeding the overcurrent threshold value specified in

static electrical parameters section will terminate the

output pulses and start a new soft-start cycle as soon

as the voltage on the pin reduces below the threshold

value.

OSC: The oscillator-programming pin. Only two com-

ponents are required to program the oscillator fre-

quency, a resistor (tied to the V

CC and CS pins), and a

capacitor (tied to the CS and GND pins). The approxi-

mate oscillator frequency is determined by the follow-

ing simple formula:

OSC = 1/ (2*RT.CT)

Where f

OSC frequency is in hertz (Hz), RT resistance in

ohms (

Ω) and C

T capacitance in farads (F).

The

recommended range for the timing resistor is between

10kW and 100kW and the recommended range for

the timing capacitor is between 47pF and 470pF. It is

not recommended to use timing resistors less than

10k

Ω.

For best performance, keep the timing component

placement as close as possible to the IR2085S. It is

recommended to separate the ground and V

CC traces

to the timing components.

GND: Signal ground and power ground for all func-

tions. Due to high current and high frequency opera-

tion, a low impedance circuit board ground plane is

highly recommended.

HO, LO: High side and low side gate drive pins. The

high and low side drivers can be used to drive the

gate of a power MOSFET directly, without external

buffers. The drivers are capable of 1.2A peak source

and sink currents. It is recommended that the high

and low side drive pins should be located very close

to the gates of the high side and low side MOSFETs

to prevent any delay and distortion of the drive sig-

nals. The power MOSFETs should be low charge to

prevent any shoot through current.

b: The high side power input connection.

The high

side supply is derived from a bootstrap circuit using a

low-leakage schottky diode and a ceramic capacitor.

To prevent noise, the schottky diode and bypass ca-

pacitor should be located very close to the IR2085S

and separated V

CC traces are recommended.

S: The high side power return connection. VS should

be connected directly to the source terminal of the

high side MOSFET with the trace as short as pos-

sible.

CC: The IC bias input connection for the device. Al-

though the quiescent V

CC current is very low, total sup-

ply current will be higher, depending on the MOSFET

gate charge connected to the HO and LO pins, and

the programmed oscillator frequency. Total V

CC cur-

rent is the sum of quiescent V

CC current and the aver-

age current at HO and LO. Knowing the operating

frequency and the MOSFET gate charge (Q

G), the

average current can be calculated from:

ave = QG X fosc

To prevent noise problems, a bypass ceramic capacitor

connected to V

CC and GND should be placed as close

as possible to the IR2085S.

The IR2085S has an under voltage lockout feature for

the IC bias supply, V

CC. The minimum voltage required

on V

CC to make sure that the IC will work within speci-

fications is 9.5V. Asymmetrical gate signals on HO and

LO pins are expected when V

CC is between 7.5V and

8.5V.

Application Information

A 220 kHz half-bridge application circuit with full wave

synchronous rectification is shown in figure 4. On the

primary side, the IR2085S drives two IRF7493 - next

generation low charge power MOSFETs. The primary

side bias is obtained through a linear regulator from

the input voltage for start-up, and then from the trans-

former in steady state. The IRF7380, a dual 80V power

MOSFET in an SO8 package is used for the primary

side bias function. Two IRF6603 - novel DirectFET

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