LMC7101 datasheet(15/18 Pages) NSC

15 / 18 page

4.0 Capacitive Load Tolerance

(Continued)

nation of the op-amp’s output impedance and the capacitive

load induces phase lag. This results in either an under-

damped pulse response or oscillation.

Capacitive load compensation can be accomplished using

resistive isolation as shown in

Figure 4. This simple tech-

nique is useful for isolating the capacitive input of multiplex-

ers and A/D converters.

5.0 Compensating for Input

Capacitance when Using Large

Value Feedback Resistors

When using very large value feedback resistors, (usually

> 500 k

Ω) the large feed back resistance can react with the

input capacitance due to transducers, photodiodes, and cir-

cuit board parasitics to reduce phase margins.

The effect of input capacitance can be compensated for by

adding a feedback capacitor. The feedback capacitor (as in

Figure 5), C

f is first estimated by:

1 CIN ≤ R2 Cf

which typically provides significant overcompensation.

Printed circuit board stray capacitance may be larger or

smaller than that of a breadboard, so the actual optimum

value for C

F may be different. The values of CF should be

checked on the actual circuit. (Refer to the LMC660 quad

CMOS amplifier data sheet for a more detailed discussion.)

DS011991-11

FIGURE 4. Resistive Isolation

of a 330 pF Capacitive Load

DS011991-12

FIGURE 5. Cancelling the Effect of Input Capacitance

LMC7101 Datasheet(PDF) 15 Page - National Semiconductor (TI)