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82C54 Datasheet(PDF) 13 Page - Intel Corporation |
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82C54 Datasheet(HTML) 13 Page - Intel Corporation |
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13 / 18 page ![]() 82C54 After writing the Control Word and initial count the counter will not be loaded until the CLK pulse after a trigger This CLK pulse does not decrement the count so for an initial count of N OUT does not strobe low until Na1 CLK pulses after a trigger A trigger results in the Counter being loaded with the initial count on the next CLK pulse The counting sequence is retriggerable OUT will not strobe low for N a 1 CLK pulses after any trigger GATE has no effect on OUT If a new count is written during counting the current counting sequence will not be affected If a trigger occurs after the new count is written but before the current count expires the Counter will be loaded with the new count on the next CLK pulse and counting will continue from there 231244 – 13 Figure 20 Mode 5 Signal Low Status Or Going Rising High Modes Low 0 Disables Enables counting counting 1 1) Initiates counting 2) Resets output after next clock 2 1) Disables counting Initiates Enables 2) Sets output counting counting immediately high 3 1) Disables counting Initiates Enables 2) Sets output counting counting immediately high 4 Disables Enables counting counting 5 Initiates counting Figure 21 Gate Pin Operations Summary MODE MIN MAX COUNT COUNT 01 0 11 0 22 0 32 0 41 0 NOTE 0 is equivalent to 216 for binary counting and 104 for BCD counting Figure 22 Minimum and Maximum initial Counts 13 |
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