Connection Diagrams

LMX2315LMX2320LMX2325

TLW12339 – 2

20-Lead (0173 Wide) Thin Shrink Small Outline Package (TM)

Order Number LMX2315TM LMX2315TMX LMX2325TM LMX2325TMX LMX2320TM or LMX2320TMX

See NS Package Number MTC20

Pin Descriptions

Pin No

Pin Name

IO

Description

1

I

Oscillator input A CMOS inverting gate input intended for connection to a crystal resonator for

CMOS or TTL logic gate May also be used as a buffer for an externally provided reference oscillator

3

O

Oscillator output

Power supply voltage input Input may range from 27V to 55V Bypass capacitors should be placed

as close as possible to this pin and be connected directly to the ground plane

O

Internal charge pump output For connection to a loop filter for driving the input of an external VCO

7

GND

Ground

8

LD

O

Lock detect Output provided to indicate when the VCO frequency is in ‘‘lock’’ When the loop is

locked the pin’s output is HIGH with narrow low pulses

10

I

Prescaler input Small signal input from the VCO

11

CLOCK

I

High impedance CMOS Clock input Data is clocked in on the rising edge into the various counters

and registers

13

DATA

I

Binary serial data input Data entered MSB first LSB is control bit High impedance CMOS input

14

LE

I

Load enable input (with internal pull-up resistor) When LE transitions HIGH data stored in the shift

registers is loaded into the appropriate latch (control bit dependent) Clock must be low when LE

toggles high or low See Serial Data Input Timing Diagram

15

FC

I

Phase control select (with internal pull-up resistor) When FC is LOW the polarity of the phase

comparator and charge pump combination is reversed

16

BISW

O

Analog switch output When LE is HIGH the analog switch is ON routing the internal charge pump

17

O

Monitor pin of phase comparator input CMOS output

18

O

resistor

19

PWDN

I

Power Down (with internal pull-up resistor)

Power down function is gated by the return of the charge pump to a TRI-STATE condition

20

O

2912

NC

No connect

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