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A3980KLP Datasheet(PDF) 18 Page - Allegro MicroSystems

Part # A3980KLP
Description  Automotive DMOS Microstepping Driver with Translator
PDF  18 Pages
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Manufacturer  ALLEGRO [Allegro MicroSystems]
Direct Link  http://www.allegromicro.com
Logo ALLEGRO - Allegro MicroSystems

A3980KLP Datasheet(HTML) 18 Page - Allegro MicroSystems

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Automotive DMOS Microstepping Driver
with Translator
A3980
17
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
Terminal List Table
Name
Description
Number
SENSE1
Sense resistor for full-bridge 1
1
SR
Enable synchronous rectification
2
DIR
Logic input
3
OUT1A
Output A for for full-bridge 1
4
PFD
Mixed decay setting
5
RC1
Analog input for fixed off-time for full-bridge 1
6
AGND
Analog ground
7
REF
Current trip reference voltage input
8
RC2
Analog input for fixed off-time for full-bridge 2
9
VDD
Logic supply voltage
10
OUT2A
Output A for for full-bridge 2
11
MS2
Logic input
12
MS1
Logic input
13
SENSE2
Sense resistor for full-bridge 2
14
VBB2
Load supply 2
15
FF1
Fault flag 1
16
FF2
Fault flag 2
17
OUT2B
Output B for for full-bridge 2
18
STEP
Logic input
19
VREG
Regulator decoupling
20
PGND
Power ground
21
VCP
Reservoir capacitor
22
CP1
Charge pump capacitor 1
23
CP2
Charge pump capacitor 2
24
OUT1B
Output B for for full-bridge 1
25
ENABLE
Logic input
26
SLEEP
Logic input
27
VBB1
Load supply 1
28
28
27
26
25
24
23
22
21
20
19
18
17
16
15
1
2
3
4
5
6
7
8
9
10
11
12
13
14
Reg
÷8
VDD
VBB1
VBB2
SENSE1
SR
DIR
OUT1A
PFD
RC1
AGND
REF
RC2
VDD
OUT2A
MS2
MS1
SENSE2
VBB1
SLEEP
ENABLE
OUT1B
CP2
CP1
VCP
PGND
VREG
STEP
OUT2B
FF2
FF1
VBB2
Pin-out Diagram



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