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MM58174 Datasheet(PDF) 7 Page - National Semiconductor (TI) |
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MM58174 Datasheet(HTML) 7 Page - National Semiconductor (TI) |
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7 / 8 page ![]() Operating Conditions MM58174AN TA eb40 Cto85 C VDD e 5V TABLE IV Read Timing Data from Peripheral to Microprocessor Symbol Parameter MM58174AN Typ Units Comments Min Max tACS0 Address Bus Valid to Chip Select ON (CS e 0) 0 ns tCSR Chip Select ON to Read Strobe 0 ns tRD Read Cycle Access Time from 900 450 ns CL e 100 pF Read Strobe to Data Bus Valid tRH Data Hold Time from Trailing Edge of 0 330 ns Read Strobe tRA Address Bus Hold Time from 70 500 ns Trailing Edge of Read Strobe tACS1 Address Change to Chip Select OFF 0 40 ns tAD Address Bus Valid to Data Valid 1850 850 ns CL e 100 pF tHZ Time from Trailing Edge of Read Strobe until Interface Device Bus 0 330 ns Drivers are in TRI-STATE Mode tRW Read Strobe Width 14 m s tAR Address Bus Valid to Read Strobe 500 ns Note 1 In order not to degrade timekeeping accuracy the number of Read strobes in any one second should be less than 10000 Note 2 If address and read occur simultaneously then they must exist for tAR a tAD TABLE V Write Timing Data from Microprocessor to Peripheral Symbol Parameter MM58174AN Typ Units Comments Min Max tACS0 Address Bus Valid to Chip Select ON (CS e 0) 0 ns tCSW Chip Select ON to Write Strobe 0 450 ns tAW Address Bus Valid to Write Strobe 725 ns tWW Write Strobe Width 670 ns tDW Data Bus Valid before Write Strobe 70 ns tWA Address Bus Hold Time following Write Strobe 165 ns tWD Data Bus Hold Time following Write Strobe 185 ns tACS1 Address Change to Chip Select OFF (CS e 1) 0 ns Note 3 If address and write occur simultaneously then they must exist for tAW and tWW 7 |
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