LPS25H datasheet(17/45 Pages) STMICROELECTRONICS

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LPS25H

Digital interfaces

5.3

SPI bus interface

The LPS25H SPI is a bus slave. The SPI allows to write and read the registers of the device.

The serial interface interacts with the outside world with 4 wires: CS, SPC, SDI and SDO.

Figure 6. Read and write protocol

CS is the serial port enable and it is controlled by the SPI master. It goes low at the start of

the transmission and returns to high at the end. SPC is the serial port clock and it is

controlled by the SPI master. It is stopped high when CS is high (no transmission). SDI and

SDO are respectively the serial port data input and output. Those lines are driven at the

falling edge of SPC and should be captured at the rising edge of SPC.

Both the read register and write register commands are completed in 16 clock pulses or in

multiples of 8 in the case of multiple bytes read/write. Bit duration is the time between two

falling edges of SPC. The first bit (bit 0) starts at the first falling edge of SPC after the falling

edge of CS while the last bit (bit 15, bit 23,...) starts at the last falling edge of SPC just

before the rising edge of CS.

bit 0: RW bit. When 0, the data DI(7:0) is written into the device. When 1, the data DO(7:0)

from the device is read. In the latter case, the chip will drive SDO at the start of bit 8.

bit 1: MS bit. When 0, the address will remain unchanged in multiple read/write commands.

When 1, the address will be auto incremented in multiple read/write commands.

bit 2-7: address AD(5:0). This is the address field of the indexed register.

bit 8-15: data DI(7:0) (write mode). This is the data that is written into the device (MSb first).

bit 8-15: data DO(7:0) (read mode). This is the data that is read from the device (MSb first).

In multiple read/write commands further blocks of 8 clock periods are added. When the MS

bit is 0 the address used to read/write data remains the same for every block. When MS bit

is 1 the address used to read/write data is increased at every block.

The function and the behavior of SDI and SDO remain unchanged.

SPC

SDI

SDO

AD5 AD4 AD3 AD2 AD1 AD0

DI7 DI6 DI5 DI4 DI3 DI2 DI1 DI0

DO7 DO6 DO5 DO4 DO3 DO2 DO1 DO0

LPS25H Datasheet(PDF) 17 Page - STMicroelectronics