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5

PS8187A

06/29/99

PS301/PS302/PS303

Precision, Single Supply SPST Analog Switches

Test Circuits/Timing Diagrams

Figure 2. Switching Time

Figure 3. Break-Before-Make Interval (PS303 only)

Figure 4. Charge Injection

GND

+5V

NO

or NC

COM

V

COM = 3V

Logic

Input

IN

V+

tr <20ns

tf <20ns

()

1k

Ω

35pF

LOGIC INPUT WAVEFORMS INVERTED FOR

SWITCHES THAT HAVE OPPOSITE LOGIC

t

OFF

t

ON

V

OUT

90%

Logic

Input

Switch

Output

+3V

0V

0V

50%

90%

V+

NO1

GND

NC

NO

+3V

IN

V+

+3V

50%

90%

90%

Logic

Input

Logic

Input

0V

0V

Switch

Output

INCLUDES FIXTURE AND STRAY CAPACITANCE.

tD

V

35

OUT

300

Ω

pF

V+

+5V

NO or

NC

GND

COM

R

GEN

1nF

V

OUT

∆V

OUT

IN

V

GEN

ON

ON

OFF

OFF

OFF

OFF

IN

Q = (

∆V

IN

Logic

Input

IN POLARITY DEPENDS ON NO OR NC SWITCH FUNCTION

Ω