PC97338 datasheet(5/221 Pages) NSC

5 / 221 page

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Table of Contents

1.0 Pin Descriptions

1.1 CONNECTION DIAGRAMS ............................................................................................................. 18

1.2 SIGNAL/PIN DESCRIPTIONS .......................................................................................................... 22

2.0 Configuration

2.1 OVERVIEW ...................................................................................................................................... 36

2.2 CONFIGURATION REGISTER SETUP ........................................................................................... 36

2.2.1 Hardware Device Configuration .............................................................................................. 36

2.2.2 Software Device Configuration ................................................................................................ 38

2.2.3 Updating Configuration Registers ........................................................................................... 38

2.2.4 Reserved Bits in Configuration Registers ................................................................................ 38

2.2.5 INDEX and DATA Register Locations ..................................................................................... 38

2.2.6 Plug and Play Protocol ............................................................................................................ 39

2.3 THE CONFIGURATION REGISTERS .............................................................................................. 40

2.3.1 Configuration Register Bitmaps ............................................................................................... 41

2.3.2 Function Enable Register (FER), Index 00h ............................................................................ 45

2.3.3 Function Address Register (FAR), Index 01h .......................................................................... 47

2.3.4 Power and Test Register (PTR), Index 02h ............................................................................ 47

2.3.5 Function Control Register (FCR), Index 03h ........................................................................... 48

2.3.6 Printer Control Register (PCR), Index 04h .............................................................................. 49

2.3.7 Power Management Control Register (PMC), Index 06h ........................................................ 50

2.3.8 Tape, SCCs and Parallel Port Configuration Register (TUP), Index 07h ................................ 51

2.3.9 SuperI/O Chip Identification Register (SID), Index 08h ........................................................... 52

2.3.10 Advanced SuperI/O Chip Configuration Register (ASC), Index 09h ..................................... 52

2.3.11 Chip Select 0 Low Address Register (CS0LA), Index 0Ah .................................................... 53

2.3.12 Chip Select 0 Configuration Register (CS0CF), Index 0Bh ................................................... 53

2.3.13 Chip Select 1 Low Address Register (CS1LA), Index 0Ch .................................................... 54

2.3.14 Chip Select 1 Configuration Register (CS1CF), Index 0Dh ................................................... 54

2.3.15 Chip Select 0 High Address Register (CS0HA), Index 10h ................................................... 55

2.3.16 Chip Select 1 High Address Register (CS1HA), Index 11h ................................................... 55

2.3.17 SuperI/O Chip Configuration Register 0 (SCF0), Index 12h ................................................. 55

2.3.18 SuperI/O Chip Configuration Register 1 (SCF1), Index 18h ................................................. 56

2.3.19 Plug and Play Configuration 0 Register (PNP0), Index 1Bh ................................................. 57

2.3.20 Plug and Play Configuration 1 Register (PNP1), Index 1Ch ................................................. 58

2.3.21 SuperI/O Chip Configuration Register 2 (SCF2), Index 40h ................................................. 58

2.3.22 Plug and Play Configuration 2 Register (PNP2), Index 41h .................................................. 59

2.3.23 Parallel Port Base Address Low Byte Register (PBAL), Index 42h ....................................... 60

2.3.24 Parallel Port Base Address High Byte Register (PBAH), Index 43h ..................................... 60

2.3.25 SCC1 Base Address Low Byte Register (S1BAL), Index 44h ............................................... 61

2.3.26 SCC1 Base Address High Byte Register (S1BAH), Index 45h ............................................. 61

2.3.27 SCC2 Base Address Low Byte Register (S2BAL), Index 46h ............................................... 61

2.3.28 SCC2 Base Address High Byte Register (S2BAH), Index 47h ............................................. 62

2.3.29 FDC Base Address Low Byte Register (FBAL), Index 48h ................................................... 62

2.3.30 FDC Base Address High Byte Register (FBAH,) Index 49h .................................................. 62

PC97338 Datasheet(PDF) 5 Page - National Semiconductor (TI)

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