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STL20DN10F7 Datasheet(PDF) 1 Page - STMicroelectronics |
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STL20DN10F7 Datasheet(HTML) 1 Page - STMicroelectronics |
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1 / 14 page ![]() This is information on a product in full production. April 2014 DocID023935 Rev 3 1/14 STL20DN10F7 Dual N-channel 100 V, 0.059 Ω typ., 5 A STripFET™ VII DeepGATE™ Power MOSFET in a PowerFLAT™ 5x6 double island package Datasheet - production data Figure 1. Internal schematic diagram Features • N-channel enhancement mode • Lower R DS(on) x area vs previous generation • 100% avalanche rated Applications • Switching applications Description This device utilizes the 7 th generation of design rules of ST’s proprietary STripFET™ technology, with a new gate structure. The resulting Power MOSFET exhibits the lowest R DS(on) in all packages. PowerFLAT™ 5x6 double island 1 4 8 5 1 4 Order code VDS RDS(on) max ID STL20DN10F7 100 V 0.067 Ω 5 A Table 1. Device summary Order code Marking Package Packaging STL20DN10F7 20DN10F7 PowerFLAT™ 5x6 double island Tape and reel www.st.com |
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Similar Description - STL20DN10F7 |
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