STNRGPF01 datasheet(5/40 Pages) STMICROELECTRONICS

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DocID030377 Rev 2

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STNRGPF01

STNRGPF01 control architecture

The STNRGPF01 implements mixed signal (analog/digital) control. The inner current loop is

performed by hardware and the outer voltage loop is performed by a digital PI controller.

The device performs cascaded control for voltage and current loops to regulate the output

voltage by acting on the total average inductor current.

Figure 1. STNRGPF01 control scheme

Figure 1 shows the STNRGPF01 control scheme. As can be observed, the difference

between the output voltage feedback Vout_fb and reference Vout_ref is sent to a digital PI

controller, which calculates the peak of the input average total current ipk_ref. (internal digital

section, green line).

The PFC current reference is internally generated and is output from the I/O FFD block as

the PWM signal. After filtering it becomes the total average sinusoidal input current

reference itot_ref for the inner current loop (external analog section, red line). The difference

between the current reference itot_ref and the input current feedback itot_fb is sent to the

analog PI controller.

STNRGPF01 Datasheet(PDF) 5 Page - STMicroelectronics