SCANPSC110F datasheet(12/29 Pages) NSC

12 / 29 page

Level 2 Protocol (Continued)

Instructions that insert a ’PSC110F register into the ac-

tive scan chain so that the register can be captured or

updated

(BYPASS, SAMPLE/PRELOAD, EXTEST, ID-

CODE, MODESEL, MCGRSEL, LFSRSEL, CNTRSEL).

Instructions that configure local ports or control the op-

eration of the linear feedback shift register and counter

registers

(UNPARK,

PARKTRL,

PARKRTI,

PARK-

PAUSE, GOTOWAIT, SOFTRESET, LFSRON, LFS-

ROFF, CNTRON, CNTROFF). These instructions, along

with any other yet undefined Op-Codes, will cause the

device identification register to be inserted into the ac-

tive scan chain.

LEVEL 2 INSTRUCTION DESCRIPTIONS

BYPASS: The BYPASS instruction selects the bypass regis-

ter for insertion into the active scan chain when the

’PSC110F is selected.

EXTEST:

The

EXTEST

instruction

selects

the

boundary-scan register for insertion into the active scan

chain. The boundary-scan register consists of seven

“sample only” shift cells connected to the S

(0–5) and OE in-

puts. On the ’PSC110F, the

EXTEST instruction performs the

same function as the

SAMPLE/PRELOAD instruction, since

there aren’t any scannable outputs on the device.

SAMPLE/PRELOAD: The SAMPLE/PRELOAD instruction

selects the boundary-scan register for insertion into the ac-

tive scan chain. The boundary-scan register consists of

seven “sample only” shift cells connected to the S

(0–5) and

OE inputs.

IDCODE: The IDCODE instruction selects the device identi-

fication register for insertion into the active scan chain. When

IDCODE is the current active instruction the device identifi-

cation “0FC0E01F” Hex is captured upon exiting the

Capture-DR state.

TABLE 5. Level 2 Protocol and Op-Codes

Instructions

Hex Op-Code

Binary Op-Code

Data Register

BYPASS

11111111

Bypass Register

EXTEST

00000000

Boundary-Scan Register

SAMPLE/PRELOAD

10000001

Boundary-Scan Register

IDCODE

10101010

Device Identification Register

UNPARK

11100111

Device Identification Register

PARKTLR

11000101

Device Identification Register

PARKRTI

10000100

Device Identification Register

PARKPAUSE

11000110

Device Identification Register

GOTOWAIT*

11000011

Device Identification Register

MODESEL

10001110

Mode Register

MCGRSEL

00000011

Multi-Cast Group Register

SOFTRESET

10001000

Device Identification Register

LFSRSEL

11001001

Linear Feedback Shift Register

LFSRON

00001100

Device Identification Register

LFSROFF

10001101

Device Identification Register

CNTRSEL

11001110

32-Bit TCK Counter Register

CNTRON

00001111

Device Identification Register

CNTROFF

10010000

Device Identification Register

Other Undefined

TBD

Device Identification Register

Note 4: All other instructions act on selected ’PSC110Fs only.

UNPARK: This instruction unparks the Local Scan Port Net-

work and inserts it into the active scan chain as configured

by the Mode register (see

Table 4). Unparked LSPs are se-

quenced synchronously with the ’PSC110F’s TAP controller.

When a LSP has been parked in the

Test-Logic-Reset or

Run-Test/Idle state, it will not become unparked until the

’PSC110F’s TAP Controller enters the

Run-Test/Idle state

following the

UNPARK instruction. If an LSP has been

parked in one of the stable pause states (

Pause-DR or

Pause-IR), it will not become unparked until the ’PSC110F’s

TAP Controller enters the respective pause state. (See

Fig-

ures 9, 10, 11, 12).

PARKTLR: This instruction causes all unparked LSPs to be

parked in the

Test-Logic-Reset TAP controller state and re-

moves the LSP network from the active scan chain. The LSP

controllers keep the LSPs parked in the

Test-Logic-Reset

state by forcing their respective TMS

L output with a constant

logic “1” while the LSP controller is in the

Parked-TLR state

(see

Figure 4 ).

PARKRTI: This instruction causes all unparked LSPs to be

parked in the

Run-Test/Idle state. When a LSP

n is active (un-

parked), its TMS

L signals follow TMSB and the LSPn control-

ler state transitions are synchronized with the TAP Controller

state transitions of the ’PSC110F. When the instruction reg-

ister is updated with the

PARKRTI instruction, TMS

L will be

forced to a constant logic “0”, causing the unparked local

TAP Controllers to be parked in the

Run-Test/Idle state.

When an LSP

n is parked, it is removed from the active scan

chain.

PARKPAUSE: The PARKPAUSE instruction has dual func-

tionality. It can be used to park unparked LSPs or to unpark

parked LSPs. The instruction places all unparked LSPs in

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