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STM32F102xx Datasheet(PDF) 13 Page - STMicroelectronics

Part # STM32F102xx
Description  This errata sheet applies to the revisions
PDF  41 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM32F102xx Datasheet(HTML) 13 Page - STMicroelectronics

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STM32F10xx8 STM32F10xxB
STM32F10xx8 and STM32F10xxB silicon limitations
2.1
Voltage glitch on ADC input 0
Description
A low-amplitude voltage glitch may be generated (on ADC input 0) on the PA0 pin, when the
ADC is converting with injection trigger. It is generated by internal coupling and
synchronized to the beginning and the end of the injection sequence, whatever the
channel(s) to be converted.
The glitch amplitude is less than 150 mV with a typical duration of 10 ns (measured with the
I/O configured as high-impedance input and left unconnected). If PA0 is used as a digital
output, this has no influence on the signal. If PA0 is used has a digital input, it will not be
detected as a spurious transition, providing that PA0 is driven with an impedance lower than
5 k
Ω. This glitch does not have any influence on the remaining port A pin or on the ADC
conversion injection results, in single ADC configuration.
When using the ADC in dual mode with injection trigger, and in order to avoid any side
effect, it is advised to distribute the analog channels so that Channel 0 is configured as an
injected channel.
Workaround
None.
2.2
Flash memory read after WFI/WFE instruction
Conditions
•
Flash prefetch on
•
Flash memory timing set to 2 wait states
•
FLITF clock stopped in Sleep mode
Description
If a WFI/WFE instruction is executed during a Flash memory access and the Sleep duration
is very short (less than 2 clock cycles), the instruction fetch from the Flash memory may be
corrupted on the next wakeup event.
Workaround
When using the Flash memory with two wait states and prefetch on, the FLITF clock must
not be stopped during the Sleep mode – the FLITFEN bit in the RCC_AHBENR register
must be set (keep the reset value).
2.3
Debug registers cannot be read by user software
Description
The DBGMCU_IDCODE and DBGMCU_CR debug registers are accessible only in debug
mode (not accessible by the user software). When these registers are read in user mode,
the returned value is 0x00.



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