STM32F769AI datasheet(29/255 Pages) STMICROELECTRONICS

29 / 255 page

DocID029041 Rev 4

29/255

STM32F765xx STM32F767xx STM32F768Ax STM32F769xx

Functional overview

Figure 5. VDDUSB connected to external power supply

The DSI (Display Serial Interface) sub-system uses several power supply pins which are

independent from the other supply pins:

•

VDDDSI is an independent DSI power supply dedicated for DSI Regulator and

MIPI D-PHY. This supply must be connected to global VDD.

•

The VCAPDSI pin is the output of DSI Regulator (1.2V) which must be connected

externally to VDD12DSI.

•

The VDD12DSI pin is used to supply the MIPI D-PHY, and to supply the clock and data

lanes pins. An external capacitor of 2.2 uF must be connected on the VDD12DSI pin.

•

The VSSDSI pin is an isolated supply ground used for DSI sub-system.

•

If the DSI functionality is not used at all, then:

–

The VDDDSI pin must be connected to global VDD.

–

The VCAPDSI pin must be connected externally to VDD12DSI but the external

capacitor is no more needed.

–

The VSSDSI pin must be grounded.

2.18

Power supply supervisor

2.18.1

Internal reset ON

On packages embedding the PDR_ON pin, the power supply supervisor is enabled by

holding PDR_ON high. On the other packages, the power supply supervisor is always

enabled.

The device has an integrated power-on reset (POR)/ power-down reset (PDR) circuitry

coupled with a Brownout reset (BOR) circuitry. At power-on, POR/PDR is always active and

ensures proper operation starting from 1.8 V. After the 1.8 V POR threshold level is

reached, the option byte loading process starts, either to confirm or modify default BOR

thresholds, or to disable BOR permanently. Three BOR thresholds are available through

STM32F769AI Datasheet(PDF) 29 Page - STMicroelectronics