TP3069WM datasheet(4/18 Pages) NSC

4 / 18 page

Functional Description (Continued)

The FSX frame sync pulse controls the sampling of the filter

output and then the successive-approximation encoding cy-

cle begins The 8-bit code is then loaded into a buffer and

shifted out through DX at the next FSX pulse The total en-

coding delay will be approximately 165 ms (due to the trans-

mit filter) plus 125 ms (due to encoding delay) which totals

290 ms Any offset voltage due to the filters or comparator is

cancelled by sign bit integration

RECEIVE SECTION

The receive section consists of an expanding DAC which

drives a fifth order switched-capacitor low pass filter

clocked at 256 kHz The decoder is A-law and the 5th order

low pass filter corrects for the sin xx attenuation due to the

8 kHz samplehold The filter is then followed by a 2nd or-

der RC active post-filter with its output at VFRO The receive

section is unity-gain but gain can be added by using the

power amplifiers Upon the occurrence of FSR the data at

the DR input is clocked in on the falling edge of the next

eight BCLKR (BCLKX) periods At the end of the decoder

time slot the decoding cycle begins and 10 ms later the

decoder DAC output is updated The total decoder delay is

10 ms (decoder update) plus 110 ms (filter delay) plus

625 ms(

frame) which gives approximately 180 ms

RECEIVE POWER AMPLIFIERS

Two inverting mode power amplifiers are provided for direct-

ly driving a matched line interface transformer The gain of

the first power amplifier can be adjusted to boost the g25V

peak output signal from the receive filter up to g33V peak

into an unbalanced 300X load or g40V into an unbal-

anced 15 kX load The second power amplifier is internally

connected in unity-gain inverting mode to give 6 dB of signal

gain for balanced loads

Maximum power transfer to a 600X subscriber line termina-

tion is obtained by differentially driving a balanced trans-

former with a S2 1 turns ratio as shown in

Figure 4 A total

peak power of 156 dBm can be delivered to the load plus

termination

ENCODING FORMAT AT DX OUTPUT

TP3069

A-Law

(Includes Even Bit Inversion)

VIN eaFull-Scale

101010

VIN e 0V

010101

VIN ebFull-Scale

101010

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