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eZ80F91 Datasheet(PDF) 8 Page - Zilog, Inc.

Part # eZ80F91
Description  Factory-default operating clock frequency at 50 MHz
PDF  30 Pages
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Manufacturer  ZILOG [Zilog, Inc.]
Direct Link  http://www.zilog.com
Logo ZILOG - Zilog, Inc.

eZ80F91 Datasheet(HTML) 8 Page - Zilog, Inc.

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PS026102-1207
Pin Description
Zdots® SBC for eZ80AcclaimPlus!™ Connectivity ASSP
Product Specification
4
Pin Description
Peripheral Bus Connector
Figure 2 displays the pin layout of the 60-pin Peripheral Bus Connector (JP1) of the
Zdots®. Table 1 on page 5 describes the pins and their functions.
All signals with an overline are active Low. For example, B/W, for which WORD
is active Low, and B/W, for which BYTE is active Low.
Figure 2. Zdots Peripheral Bus Connector Pin Configuration—JP1
Note:



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