ATS468 datasheet(10/15 Pages) ALLEGRO

10 / 15 page

Three-Wire True Zero-Speed Differential Peak-Detecting

Sensor IC with Continuous Calibration

ATS468

Allegro MicroSystems, LLC

115 Northeast Cutoff

Worcester, Massachusetts 01615-0036 U.S.A.

1.508.853.5000; www.allegromicro.com

Power Supply Protection

The device contains an on-chip regulator and can operate

throughout a wide VCC range. For devices that must be operated

from an unregulated power supply, transient protection must

be added externally. For applications using a regulated line,

EMI/ RFI protection may still be required. Contact Allegro for

information on the circuitry required for compliance with various

EMC specifications. Refer to figure 6 for an example of a basic

application circuit.

Undervoltage Lockout

When the supply voltage falls below the undervoltage lockout

voltage, VCC(uv), the device enters Reset, where the output state

returns to the Power-On State (POS) until sufficient VCC

is supplied.

Assembly Description

This device is integrally molded into a plastic body that has been

optimized for size, ease of assembly, and manufacturability. High

operating temperature materials are used in all aspects of con-

struction.

Device Operation

Each operating mode is described in detail below.

Power-On When power (VCC > VCC(min)) is applied to the

device, a short period of time is required to power the various

portions of the IC. During this period, the ATS468 powers-on in

the high voltage state, VOUT(high), and the digital tracking DAC

gets ready to track the VPROC signal. After power-on, there are

conditions that could induce a change in the output state. Such an

event could be caused by thermal transients, but would require a

static applied magnetic field, proper signal polarity, and particular

direction and magnitude of internal signal drift.

Initial Offset Adjust The device initially cancels the effects of

chip, magnet, and installation offsets. After offsets have been

cancelled, the device is ready to provide the first output switch.

The period of time required for both Power-On and Initial Offset

Adjust is defined as the Power-On Time.

Calibration Mode The calibration mode allows the device to

automatically select the proper signal gain and continue to adjust

for offsets. The AGC is active, and selects the optimal signal

gain based on the amplitude of the VPROC signal. Following each

adjustment to the AGC DAC, the Offset DAC is also adjusted to

ensure the internal analog signal is properly centered.

During this mode, the tracking DAC is active and output switch-

ing occurs, but the duty cycle is not guaranteed to be within

specification.

Running Mode After the Initial Calibration period, CI, estab-

lishes a signal gain, the device moves to running mode. During

running mode, the device tracks the input signal and gives an

output edge for every peak of the signal. AOA remains active to

compensate for any offset drift over time.

The ATS468 incorporates an algorithm for adjusting the signal

gain during running mode. This algorithm is designed to optimize

the VPROC signal amplitude in instances where the magnetic

VCC

Vsupply

VPU

VOUT

CBYP

0.1 µF

COUT

RPU

1 k

100

GND

ATS468

OUT

TEST

Figure 6: Typical Application Diagram

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