NAND256R3A datasheet(31/57 Pages) STMICROELECTRONICS

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NAND128-A, NAND256-A, NAND512-A, NAND01G-A

Figure 21. Garbage Collection

Garbage Collection

When a data page needs to be modified, it is faster

to write to the first available page, and the previous

page is marked as invalid. After several updates it

is necessary to remove invalid pages to free some

memory space.

To free this memory space and allow further pro-

gram operations it is recommended to implement

a Garbage Collection algorithm. In a Garbage Col-

lection software the valid pages are copied into a

free area and the block containing the invalid pag-

es is erased (see Figure 21.).

Wear-leveling Algorithm

For write-intensive applications, it is recommend-

ed to implement a Wear-leveling Algorithm to

monitor and spread the number of write cycles per

block.

In memories that do not use a Wear-Leveling Algo-

rithm not all blocks get used at the same rate.

Blocks with long-lived data do not endure as many

write cycles as the blocks with frequently-changed

data.

The Wear-leveling Algorithm ensures that equal

use is made of all the available write cycles for

each block. There are two wear-leveling levels:

■

First Level Wear-leveling, new data is

programmed to the free blocks that have had

the fewest write cycles

■

Second Level Wear-leveling, long-lived data is

copied to another block so that the original

block can be used for more frequently-

changed data.

The Second Level Wear-leveling is triggered when

the difference between the maximum and the min-

imum number of write cycles per block reaches a

specific threshold.

Error Correction Code

An Error Correction Code (ECC) can be imple-

mented in the Nand Flash memories to identify

and correct errors in the data.

For every 2048 bits in the device it is recommend-

ed to implement 22 bits of ECC (16 bits for line par-

ity plus 6 bits for column parity).

An ECC model is available in VHDL or Verilog.

Contact the nearest ST Microelectronics sales of-

fice for more details.

Figure 22. Error Detection

Valid

Page

Invalid

Page

Free

Page

(Erased)

Old Area

AI07599B

New Area (After GC)

New ECC generated

during read

XOR previous ECC

with new ECC

All results

= zero?

22 bit data = 0

YES

11 bit data = 1

1 bit data = 1

Correctable

Error

ECC Error

No Error

ai08332

>1 bit

= zero?

YES

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