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X5083P Datasheet(PDF) 14 Page - Xicor Inc.

Part # X5083P
Description  CPU Supervisor with 8Kbit SPI EEPROM
PDF  21 Pages
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Manufacturer  XICOR [Xicor Inc.]
Direct Link  http://www.xicor.com
Logo XICOR - Xicor Inc.

X5083P Datasheet(HTML) 14 Page - Xicor Inc.

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X5083
Characteristics subject to change without notice.
14 of 21
REV 1.1.6 6/25/02
www.xicor.com
Data Output Timing
Notes: (3) This parameter is periodically sampled and not 100% tested.
(4) tWC is the time from the rising edge of CS after a valid write sequence has been sent to the end of the self-timed internal nonvolatile
write cycle.
Serial Output Timing
Serial Input Timing
Symbol
Parameter
2.7V–5.5V
Unit
Min.
Max.
fSCK
Clock frequency
0
3.3
MHz
tDIS
Output disable time
150
ns
tV
Output valid from clock low
130
ns
tHO
Output hold time
0
ns
tRO
(3)
Output rise time
50
ns
tFO
(3)
Output fall time
50
ns
SCK
CS
SO
SI
MSB Out
MSB–1 Out
LSB Out
ADDR
LSB IN
tCYC
tV
tHO
tWL
tWH
tDIS
tLAG
SCK
CS
SI
SO
MSB IN
tSU
tRI
tLAG
tLEAD
tH
LSB IN
tCS
tFI
High Impedance



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