TDA7718B datasheet(26/40 Pages) STMICROELECTRONICS

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I2C bus specification

TDA7718B

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DocID18305 Rev 3

I2C bus specification

5.1

Interface protocol

The interface protocol comprises:



a start condition (S)



a chip address byte (the LSB determines read/write transmission)



a subaddress byte



a sequence of data (N-bytes + acknowledge)



a stop condition (P)



the max. clock speed is 400 kbit/s



3.3 V logic compatible

Figure 20. I2C bus interface protocol

S = Start

ACK = Acknowledge

5.2

I2C bus electrical characteristics

Table 6. I2C bus electrical characteristics

Symbol

Parameter

Min

Max

Unit

fSCL

SCL clock frequency

400

kHz

VIH

High level input voltage

2.4

VIL

Low level input voltage

0.8

tHD,STA

Hold time for START

0.6

µs

tSU,STO

Setup time for STOP

0.6

µs

tLOW

Low period for SCL clock

1.3

µs

tHIGH

High period for SCL clock

0.6

µs

Fall time for SCL/SDA

300

Rise time for SCL/SDA

300

tHD,DAT

Data hold time

tSU,DAT

Data setup time

100

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